hi all,
can any body plz tell me how to handle more than one interrupts
simultaneously
in GCC .
single interrupts are working separately when I changed in startup.s
file like below:
************************************************************************
*******
# Exception Vectors
# Mapped to Address 0.
# Absolute addressing mode must be used.
# Dummy Handlers are implemented as infinite loops which can be
modified.
Vectors: LDR PC, Reset_Addr
LDR PC, Undef_Addr
LDR PC, SWI_Addr
LDR PC, PAbt_Addr
LDR PC, DAbt_Addr
NOP /* Reserved Vector */
LDR PC, IRQ_Addr
LDR PC, FIQ_Addr
Reset_Addr: .word Reset_Handler
Undef_Addr: .word Undef_Handler
SWI_Addr: .word SWI_Handler
PAbt_Addr: .word PAbt_Handler
DAbt_Addr: .word DAbt_Handler
.word 0 /* Reserved Address */
IRQ_Addr: .word uart0 /* uart0 is the service routine function
which I placed here */
FIQ_Addr: .word FIQ_Handler
Undef_Handler: B Undef_Handler
SWI_Handler: B SWI_Handler
PAbt_Handler: B PAbt_Handler
DAbt_Handler: B DAbt_Handler
IRQ_Handler: B uart0 /* uart0 is the service routine function
which I placed here */
FIQ_Handler: B FIQ_Handler
************************************************************************
*******
prototype defined is :
void uart0(void) _attribute_ ((interrupt ("IRQ")));
I hav alredy posted a mail earlier but not received any response yet.
now plz tell me how to handle multiple interrupts?
thanks.
Please check the documents available from Philips (Manual, Section VIC) and ARM (ARM7TDMI referece-manual, VIC "macrocell"). Either use an instruction like ldr pc,[pc,#-0xFF0] at the "IRQ-position" of the exception vectors or branch to a assembler-wrapper which may use the VIC's vector-adress as branch address to an ISR. Various source-examples available from the yahoo-group and in the WinARM examples-collection should demonstrate the different approaches. Martin Thomas
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