scrambler/descrambler vhdl code

good morning
Please I would a vhdl code for scrambler/descrambler which takes as 
parameter binary data and the scrambler polynomial generator with its 
intial sequence. Also I would a code for a double polynomial generator 
for example UMTS had two polynomial generator :
P1 (X) = X^17 + X^7 + 1

P2 (X) = X^17 + X^10 + X^7 + X^5 + 1

it joined a scrambler/descrambler matlab code which polynomial generator 
is P (X) = 1 + X^5 + X^12 + X^16
Thx in advance