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Forum: FPGA, VHDL & Verilog User Flash Memory, Machxo2 7000HE breakout


Author: ChrisChris (Guest)
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Hi everyone, I'm working with a project using a machxo2 7000HE at 50mhz, 
the main code is completed with the exception of being able to have the 
fpga  read and write to its internal User Flash Memory, I have figured 
out how to instantiate a EFB with IPExpress but I have idea on how to 
even start using it. So far its only purpose is to store a 12bit value 
on button press, and  add this value to other 12 bit values across the 
code where needed, its purpose is a position zero point recalibration, 
as simple as it seems I just cant figure out, same went with the 
hardened spi function, couldn't figure it so I made my own bit banged 
version of a master spi, that was simple but time consuming. Anyone have 
experience with this? I could really use some guidance please.

Author: Jan M. (mueschel)
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Have you read TN1246? Besides general information, there is a section 
"Wishbone framing" with some samples.

Author: ChrisChris (Guest)
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I have not seen this note, ill look through and see if it catches on, 
thank you. Just be nice if there was an actual vhdl example.

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