Forum: FPGA, VHDL & Verilog Simple I2C master VHDL

Author: Luk83 (Guest)
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Hallo everybody,
I am working on my bachelor project right now, and I have Coolrunner-II 
CPLD board (with 256 macrocells) and digital humidity/temperature I2C 
sensor Sensirion SHT21. I have managed to display data on 16x2 character 
display and 7seg display, but for now, I have only random numbers 
generated from LFSR to display.
So my task is to get sensor working, and I found few sample codes in 
VHDL, bud they are complicated (and need lot of macrocells). Now the 
CPLD chip is allready 72% occupied. I think that without random number 
generation it can be somewhere around 65%, which gives me like 90 free 
macrocells (maybe more if I manage to simplyfi somehow the display/sseg 

I need to create very simple I2C master, to communicate with sensor. I 
studied I2C specification, so I know how it works, but I am quite new to 
VHDL. I will be working with only one I2C slave with constant address, 
and basically I need to send start condition, address and W! bit, ack by 
sensor, and then send meassure command (8bits). Wait for meassurement 
and send S + address + R bit, ack by sensor and read 2 bytes of data. 
Sensor provides 2 modes (hold/no hold), in one SCL is blocked by sensor 
during meassurement, while in other master can communicate with other 
devices (no my case) and if meassurement not finished when sending 
add+read, sensor returnes NACK (and another add+read is needed to send). 
I am not going to calculate checksums, so after reading 2 bytes from 
sensor, master acknowlages with NACK + P. Probably I wold like to 
implement soft reset, which is just sending single command. I am not 
going to change user register (resolution of meassurement and stuff). 
Complete documentation is available here, especially chapter 5: 
If you can help me with createing code for this (at least basics and 
proper state machine needed, and important thing I have to keep in mind) 
or you know of some ready to use code (but should be as simple as 
possible) I would be realy greatful.

I know it is a long post, but I will appreciate any help.

Author: Stefan Wimmer (wswbln)
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Hi Luk83,

your approach using a FSM is the right way.

Take the sensor and LCD datasheets and draw the timing needed for 
initialisation, conversion start and LCD init and write. I think you can 
interlace LCD and sensor init. Choose a clock 2x the sensor clockrate. 
You can do it straight forward (state after state) or maybe use sub-FSMs 
for a I2C and LCD byte transfers.

When you have your timing on paper, the rest is plain code writing.
If you prefer drawing state diagrams - I think there are free versions 
of appropriate programs (ol' StateCAD comes to mind).

Author: Raghavendra B. (raghavendra_b98)
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Hi Luk83.

An opencore project I2C master slave link

In opencore many I2C projects their check other also.

Author: Duke Scarring (Guest)
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Maybe you take a look at the following documents:

XAPP385 CoolRunner-II CPLD I2C Bus Controller Implementation
XAPP799 An SMBus/I2C-Compatible Port Expander
XAPP353 CoolRunner XPLA3 SMBus Controller Implementation
XAPP328 Design of an MP3 Portable Player Using a CoolRunner CPLD
XAPP334 Utilizing XPLA3 Universal Control Terms (page 5)


Author: nagesh g. (nagesh_g)
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i need i2c master controller with 2 bit address width for cyclone II 

Author: PittyJ (Guest)
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Is there anything special with the cyclone II?
My (self written) I2C code (less than 200 lines) works without 
modification on Cyclone IV and Spartan 3.
Why can't you use one of the offered free implementations, e.q. offered 
by opencores.org?


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