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Forum: ARM programming with GCC/GNU tools Str711 Erase Bank1 flash from Bank0 only works on 2nd try.


Author: Bob Seabrook (seabrookb)
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I am using an str711 device with winarm 6/6/2006 and have a problem
erasing flash in bank1 from code in bank0 - but only after a hard reset
- retrys always work!!!!

The test always works OK if tried after erasing bank0 sectors from
bank1, indeed
erasing bank0 sectors from bank1 never fails.

What happens is the last instruction to start a bank1 flash erase
  FLASH->CR0 |= 0x80000000; //WMS
causes the device to reset,
and when reached again after the (apparent) self reset the code then
works fine.

The erase code is like the example in the separate flash_programming
manual from ST. i.e.
  FLASH->CR0 = 0; //INTM (especially) cleared so no interrupt (we'll
poll)
  FLASH->CR0 |- 0x08000000; //SER
  FLASH->CR1 |= 0x00010000; //B1F0
  FLASH->CR0 |= 0x80000000; //WMS    <-- resets device

I realise this question should be directed at ST, but I suspect someone
here may have seen this problem or may suggest what I should (re)check
quite easily. I am sure I missed something obvious or one of the things
I tested was misleading.

I tried the following with no success;-
1 - explicitly disabling interrupts
2 - using '=' instead of '|=' when writing to flash registers (since
restored original code)
3 - checked write & debug protection - defaults apply (there is no
protection)
4 - looking at RCCU->CFR bits 6 to 10 for reset cause - they were the
same when working and non working
    but when not working bit 11 was set (LOCK_INT_PENDING bit). (working
value;0x0000840b, non wkg; 0x00008c0b)
5 - resetting bit11 RCCU->CFR before the erase attempted.
6 - putting a delay before the offending FLASH->CR0 |= 0x80000000; //WMS
7 - disabled watchdog
8 - put a big delay before the failing instruction but the fail did not
happen during the delay.

I noticed that
a) the RCCU->CFR bit 11 (Lock interrupt request pending) is set in the
non
   working scenario and clear in the wrking one.
   However that interrupt is disabled (never enabled) and clearing the
pending
   bit does not cure the symptom.

I suspect something is wrongly initialised.

Thankyou for taking the time to try and help.

Bob

Author: Spencer Oliver (ntfreak)
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>
> I am using an str711 device with winarm 6/6/2006 and have a problem
> erasing flash in bank1 from code in bank0 - but only after a hard reset
> - retrys always work!!!!

If i remember correctly the str7 flash controller has issues on the
first write/erase cycle from reset - see the flash programming manual
for more details.

I would always recommend performing iap from code executed from RAM - it
is always the safest bet on any micro.

Cheers
Spen

Author: Bob Seabrook (seabrookb)
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Spencer Oliver wrote:
>>
>> I am using an str711 device with winarm 6/6/2006 and have a problem
>> erasing flash in bank1 from code in bank0 - but only after a hard reset
>> - retrys always work!!!!
>
> If i remember correctly the str7 flash controller has issues on the
> first write/erase cycle from reset - see the flash programming manual
> for more details.
>
> I would always recommend performing iap from code executed from RAM - it
> is always the safest bet on any micro.
>
> Cheers
> Spen

Spen, THANKYOU. You're are exactly right, of course, I should RTFM. Here
are the classic contradictory (face saving ;-) quotes from the flash
manual that first say you can program one bank from the other then go on
say that you cannot program bank1 from bank0 - oh what a carry on, in
hindsight they meant it more literally i.e. you can ONLY program ONE
bank from another but you must read on to find which ;-)  ;-

from the STR7_flash_programming_rm-r30_0106.pdf:

<start quote>

1 FLASH MODULE ORGANIZATION
The on-chip Flash is divided in 2 banks that can be read and modified
independently one from the other: one bank can be read while another
bank is being modified.
....
2.3 WRITE OPERATION
In this section, a Flash write operation refers either to a program
operation or an erase
operation:
....
Note After an MCU reset, the Flash module is ready and the CPU can start
fetching code from it. However, the built-in Flash Erase/Program
procedures are not initialized during the MCU reset phase, this is only
done when the first Flash Erase/Program instruction is executed.
  While the Erase/Program procedures are being initialized, Flash bank 0
is not accessible. For this reason, the first Flash Erase/Program
operation has to be fetched from RAM (in STR71x or STR73x) or from Flash
bank 1 (in STR71x). Also, due to this initialization, the first
Erase/Program operation will take more time than other subsequent
Erase/Program operations.

<end quote>

Of course, they could've just writ; You can program flash from anywhere
with the following exceptions: from the same bank, from bank0 following
reset.

Since posting the original message I had started to change the code to
program bank1 from RAM anyway, but got called off on other work, I was
hoping to simply make the instruction that started the erase into a
function, copy it to RAM and call it there. However I noticed that
function calls used 11 bit relative addresses so I was just figuring out
how to call such a routine with an absolute 32bit address - to reach
0x2000xxxx from 0x400xxxxx - when called away. I was hoping to find
simple answers in ST's IAP(in application programmer) and in Martin
Thomas' version of it.

Author: Spencer Oliver (ntfreak)
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> Since posting the original message I had started to change the code to
> program bank1 from RAM anyway, but got called off on other work, I was
> hoping to simply make the instruction that started the erase into a
> function, copy it to RAM and call it there. However I noticed that
> function calls used 11 bit relative addresses so I was just figuring out
> how to call such a routine with an absolute 32bit address - to reach
> 0x2000xxxx from 0x400xxxxx - when called away. I was hoping to find
> simple answers in ST's IAP(in application programmer) and in Martin
> Thomas' version of it.

If you download IDEaliST from Anglia -
http://www.st-angliamicro.com/software.asp
there should be a version of the IAP app note that runs the flash
programming code from RAM included with the examples.

Cheers
Spen

Author: Bob Seabrook (seabrookb)
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Spencer Oliver wrote:
> If you download IDEaliST from Anglia -
> http://www.st-angliamicro.com/software.asp
> there should be a version of the IAP app note that runs the flash
> programming code from RAM included with the examples.
>


OK - got it, Spen you're a Gem.
I take it you mean the example that installs to;
C:\Program Files\Anglia\IDEaliST\examples\str7\an2078
It certainly looks like the one from ST.com.
Thanks.

Author: Spencer Oliver (ntfreak)
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> OK - got it, Spen you're a Gem.
> I take it you mean the example that installs to;
> C:\Program Files\Anglia\IDEaliST\examples\str7\an2078
> It certainly looks like the one from ST.com.
> Thanks.

Thats the one, you can do it simpler yourself by just changing flash.c
file and put FLASH_SectorErase, FLASH_WordWrite and
FLASH_WaitForLastTask functions into RAM.

There is also an example (ramfunc) that uses the RAMFUNC macro about
placing functions in RAM. That is generally what i do to the above
functions.

Cheers
Spen

Author: Bob Seabrook (seabrookb)
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Spencer Oliver wrote:
>
> Thats the one, you can do it simpler yourself by just changing flash.c
> file and put FLASH_SectorErase, FLASH_WordWrite and
> FLASH_WaitForLastTask functions into RAM.
>
> There is also an example (ramfunc) that uses the RAMFUNC macro about
> placing functions in RAM. That is generally what i do to the above
> functions.

Here is a simple tiny example.
It erases a bank1 flash sector from bank0 -
by running only the important bit from RAM (that cannot be run from
bank0).
It is a simple example with no refinements.
It uses ST's str71x lib 3.0 or 3.1 71x_map.h, 71x_type.h.
It must be compiled to ARM (not Thumb) by listing against SRCARM in
Makefile.
Project wide optimation (o2) and interworking may be enabled.
It is from my WinARM project with application specific comments/code
removed.

The smallest necessary amount of code to run from RAM is made into a
function called erase_func() in ROM bank0.
The function erase_flash1() does the following;-
An array is declared on the stack.
The critical function code 'erase_func()' is copied to the array (from
ROM bank0 to RAM).
The array is pointed to with a function pointer (32bit).
All the flash registers that can be written from bank0 code are.
The function (pointer) is called from bank0 so critical code runs in RAM
The function in RAM returns - having erased bank1 sector.
When also erase_flash1() returns the RAM function on stack is freed.
Enjoy.

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