LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_unsigned.all; ENTITY splitser_uur IS PORT (I:IN STD_LOGIC_VECTOR(5 downto 0); T:OUT STD_LOGIC_VECTOR(3 downto 0); E:OUT STD_LOGIC_VECTOR(5 downto 0)); END splitser_uur; ARCHITECTURE behavioral OF splitser_uur IS BEGIN Process(I) BEGIN if I<"001010" then T <= "0000" ; E <= I; elsif I<"010100" and I>="001010" then T <= "0001"; E <= I - 10; elsif I<"011000" and I>="010100"then T <= "0010"; E <= I - 20; end if; END PROCESS; END behavioral;