library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.ALL; entity ones is port( in5 : in std_logic; in4 : in std_logic; in3 : in std_logic; in2 : in std_logic; in1 : in std_logic; in0 : in std_logic; out1 : out std_logic; out0 : out std_logic); end ones; architecture rtl of ones is signal in_vector: std_logic_vector(5 downto 0):=(others => '0'); begin in_vector <= in5 & in4 & in3 & in2 & in1 & in0; -- odd number of ones out0 <= '1' when unsigned(in_vector) = 1 or unsigned(in_vector) = 2 or unsigned(in_vector) = 4 or unsigned(in_vector) = 7 or unsigned(in_vector) = 8 or unsigned(in_vector) = 11 or unsigned(in_vector) = 13 or unsigned(in_vector) = 14 or unsigned(in_vector) = 16 or unsigned(in_vector) = 19 or unsigned(in_vector) = 21 or unsigned(in_vector) = 22 or unsigned(in_vector) = 25 or unsigned(in_vector) = 26 or unsigned(in_vector) = 28 or unsigned(in_vector) = 31 or unsigned(in_vector) = 32 or unsigned(in_vector) = 35 or unsigned(in_vector) = 38 or unsigned(in_vector) = 37 or unsigned(in_vector) = 41 or unsigned(in_vector) = 42 or unsigned(in_vector) = 44 or unsigned(in_vector) = 47 or unsigned(in_vector) = 49 or unsigned(in_vector) = 50 or unsigned(in_vector) = 52 or unsigned(in_vector) = 55 or unsigned(in_vector) = 56 or unsigned(in_vector) = 59 or unsigned(in_vector) = 61 or unsigned(in_vector) = 62 else '0'; -- 3 or more ones out1 <= '1' when unsigned(in_vector) = 7 or unsigned(in_vector) = 11 or unsigned(in_vector) = 13 or unsigned(in_vector) = 14 or unsigned(in_vector) = 15 or unsigned(in_vector) = 19 or unsigned(in_vector) = 21 or unsigned(in_vector) = 22 or unsigned(in_vector) = 23 or unsigned(in_vector) = 25 or unsigned(in_vector) = 26 or unsigned(in_vector) = 27 or unsigned(in_vector) = 28 or unsigned(in_vector) = 29 or unsigned(in_vector) = 30 or unsigned(in_vector) = 31 or unsigned(in_vector) = 35 or unsigned(in_vector) = 37 or unsigned(in_vector) = 38 or unsigned(in_vector) = 39 or unsigned(in_vector) = 41 or unsigned(in_vector) = 42 or unsigned(in_vector) = 43 or unsigned(in_vector) = 44 or unsigned(in_vector) = 45 or unsigned(in_vector) = 46 or unsigned(in_vector) = 47 or unsigned(in_vector) = 49 or unsigned(in_vector) = 50 or unsigned(in_vector) = 51 or unsigned(in_vector) = 52 or unsigned(in_vector) = 53 or unsigned(in_vector) = 54 or unsigned(in_vector) = 55 or unsigned(in_vector) = 56 or unsigned(in_vector) = 57 or unsigned(in_vector) = 58 or unsigned(in_vector) = 59 or unsigned(in_vector) = 60 or unsigned(in_vector) = 61 or unsigned(in_vector) = 62 or unsigned(in_vector) = 63 else '0'; end;