----------------------Data reciver-------------------------
library IEEE;
USE IEEE.STD_LOGIC_1164.all;
--USE IEEE.std_logic_unsigned.all;
USE ieee.numeric_std.all;

ENTITY data_receiver IS					--entity name
   PORT (Reset: in STD_LOGIC;				
         Clock: in STD_LOGIC;				--clock input signal
   	Rx:in STD_LOGIC_VECTOR (31 downto 0)	;	--Input signal
symbol_output:buffer STD_LOGIC_VECTOR (31 downto 0)	--symbol output to indicate channel wave0-3
);
end data_receiver;					--end of entity

architecture Behavioral of data_receiver  IS
--signal sum:unsigned(31 downto 0)
--Signal rxd: std_logic_vector(31 downto 0);
type wav00 is array (0 to 7) of integer range -128 to 127;	
--type wav01 is array (0 to 7) of integer range -128 to 127;
--type wav10 is array (0 to 7) of integer range -128 to 127;	
--type wav11 is array (0 to 7) of integer range -128 to 127;	
	
--Signal wav0:wav00:=(0,32,64,32,0,-32,-64,-32);
--Signal wav1:wav01:=(0,64,127,64,0,-64,-128,-64);
--Signal wav2:wav10:=(0,-32,-64,-32,0,32,64,32);
--Signal wav3:wav11:=(0,-64,-128,-64,0,64,127,64);


begin
wav00 is array (0 to 7) of integer range -128 to 127;	--constant to carry out compare tasks 
constant wav0:wav00:=(0,32,64,32,0,-32,-64,-32);            ----- tried to set a process for one part wav0
process begin		
wait until rising_edge(clock);
if reset ='0'then  
symbol_output<= Abs(rx-wav0(0)) ;   --Add integer value to wave 0 accumulator     i have sent this to an output ,but i dont khow how to keep this value..is this like an adder entity?

  end if;
  end process;


--Abs(wav1(0))   --Add integer value to wave 1 accumulator
--Abs(wav2(0))   --Add integer value to wave 2 accumulator
--Abs(wav3(0))   --Add integer value to wave 3 accumulator

--Abs(B-wave0(1))   --Add integer value to wave 0 accumulator  
--Abs(B-wave1(1))   --Add integer value to wave 1 accumulator
--Abs(B-wave2(1))   --Add integer value to wave 2 accumulator
--Abs(B-wave3(1))   --Add integer value to wave 3 accumulator

--Abs(C-wave0(2))   --Add integer value to wave 0 accumulator  
--Abs(C-wave1(2))   --Add integer value to wave 1 accumulator
--Abs(C-wave2(2))   --Add integer value to wave 2 accumulator
--Abs(C-wave3(2))   --Add integer value to wave 3 accumulator

--Abs(D-wave0(3))   --Add integer value to wave 0 accumulator  
--Abs(D-wave1(3))   --Add integer value to wave 1 accumulator
--Abs(D-wave2(3))   --Add integer value to wave 2 accumulator
--Abs(D-wave3(3))   --Add integer value to wave 3 accumulator

--Abs(E-wave0(4))   --Add integer value to wave 0 accumulator  
--Abs(E-wave1(4))   --Add integer value to wave 1 accumulator
--Abs(E-wave2(4))   --Add integer value to wave 2 accumulator
--Abs(E-wave3(4))   --Add integer value to wave 3 accumulator

--Abs(F-wave0(5))   --Add integer value to wave 0 accumulator  
--Abs(F-wave1(5))   --Add integer value to wave 1 accumulator
--Abs(F-wave2(5))   --Add integer value to wave 2 accumulator
--Abs(F-wave3(5))   --Add integer value to wave 3 accumulator

--Abs(G-wave0(6))   --Add integer value to wave 0 accumulator  
--Abs(G-wave1(6))   --Add integer value to wave 1 accumulator
--Abs(G-wave2(6))   --Add integer value to wave 2 accumulator
--Abs(G-wave3(6))   --Add integer value to wave 3 accumulator

--Abs(H-wave0(7))   --Add integer value to wave 0 accumulator  
--Abs(H-wave1(7))   --Add integer value to wave 1 accumulator
--Abs(H-wave2(7))   --Add integer value to wave 2 accumulator
--Abs(H-wave3(7))   --Add integer value to wave 3 accumulator


end Behavioral;						--end architeture