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-- Company: 
-- Engineer: 
-- 
-- Create Date:    20:03:34 08/19/2017 
-- Design Name: 
-- Module Name:    Reg_Data_Set - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity Reg_Data_Set is
			Port (clk		: in std_logic;
					rst 		: in std_logic;
					spi_en 	: out std_logic;
					spi_data : out std_logic_vector (15 downto 0);
					done		: out		STD_LOGIC;
					spi_addr : out std_logic_vector (7 downto 0)
					);
end Reg_Data_Set;

architecture Behavioral of Reg_Data_Set is
signal count : std_logic_vector (15 downto 0):= (others =>'0');
begin

process (clk,count)

begin
	if (rising_edge(clk)) then
		
			---------------------- Write Operation Register ----------------------
		count <= count + 1 ;
		if (count <= 5 and count >= 0) then
			spi_en <='1';
			done <= '0';
			spi_addr <= x"06";                    --- Select Buck-Boost --
			spi_data <= x"000F";
		end if;
			if (count >= 110  and count <= 140 ) then   		
			spi_en <='1';
			spi_addr <= x"07";           		 				    -- Config Buck-Boost ---
			spi_data <= x"021F";
		elsif (count >=510 and count <= 540  ) then
			spi_en <='1';
			spi_addr <= x"03";                                 -- Select DAC Register ---
			spi_data <= x"01F1";  								
		elsif (count >= 880 and count <= 910) then
			spi_en <='1';
			spi_addr <= x"04";                                       --- Config DAC Register ---
			spi_data <= x"1000";        			  		 	
		elsif (count >= 1250 and count <= 1280) then
			spi_en <='1';
			spi_addr <= x"05";                                            ---DAC Data Register ---
			spi_data <= x"FFFF";   			
		elsif (count >= 1620 and count <=1650) then
			spi_en <='1';
			spi_addr <= x"00";
			spi_data <= x"0000";	 	
		elsif(count>=1990 and count <=2020) then
			spi_en <='1';
			spi_addr <= x"00";
			spi_data <= x"0000";	
			done <= '1';
   else
			spi_en <='0';
		end if;
		end if;
end process;

end Behavioral;