module extension(input clk,output opp); //DECLARATIONS reg [15:0]array1[0:127]; reg [15:0]array2[0:49]; reg [15:0]indata; reg [15:0]insign; reg [15:0]insign1; reg [31:0]index[0:49]; reg a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,a16; reg b1,b2,b3,b4,b5,b6,b7,b8,b9,b10,b11,b12,b13,b14,b15,b16; reg c1,c2,c3,c4,c5,c6,c7,c8,c9,c10,c11,c12,c13,c14,c15,c16; reg d1,d2,d3,d4,d5,d6,d7,d8; reg e1,e2,e3,e4,e5,e6,e7; integer i=0,j,k=0,l,hh,c; wire m,n,o,p,d,e; // INITIALIZING ARRAY TO ZERO initial begin for(l=0;l<50;l=l+1) index[l]=32'b0; end //READING AN INCOMING DATA FILE FROM ARRAY1 initial begin $readmemb("indataex.txt",array1); $display("incoming data"); end //READING A SIGNATURE DATA FILE FROM ARRAY2 initial begin $readmemb("insignex.txt",array2); $display("signature "); end // READING A SINGLE DATA FROM THE MEMORY FOR EVERY CLOCK PULSE DURING RISING EDGE always @(posedge clk) begin if(i<128) begin indata=array1[i]; i=i+1; end else indata=0; end // ACTION TO BE PERFORMED DURING NEGATIVE EDGE OF THE CLOCK always @(negedge clk) begin indata=0; k=0; end //COMPARING MSB BITS OR PREFIX MATCHING always @(posedge clk ) begin for(j=0;j<50;j=j+1) begin insign=array2[j]; if (indata != 16'b0) begin if(indata[15:12] == insign[15:12]) begin index[k]=j; //$display("index [%0d]=%b",k,index[k]); k=k+1; end //else //$display("no intrusion"); end end end //KNOWING WHICH INDEX HAS MATCHED always @(k>0) begin if (indata != 16'b0) begin for(c=0;c<50;c=c+1) begin if(c