library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity dttb is end dttb; architecture Behavioral of dttb is COMPONENT DFF_1 IS PORT(D,CLOCK:IN STD_LOGIC;Q,QBAR:OUT STD_LOGIC); END COMPONENT; SIGNAL P1,I1,U1,UB1:STD_LOGIC; begin S1:DFF_1 PORT MAP(P1,I1,U1,UB1); P1<='1','0' after 15 ns; I1<='0', '1' after 10 ns,'0' after 20 ns,'1' after 30 ns,'0' after 40 ns; end Behavioral;