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Forum: FPGA, VHDL & Verilog biphasic waveform


Author: Bose Chandran (Company: RD) (bosechandran)
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Dear all im new here try to learning  verilog and vhdl. i need to 
generate biphasic waveform width of the pulse 12.5 ns.
 for +ve 12.5 ns  and -ve 12.5 ns

for the second channel vary the width of pulse i should change and delay 
b/w first and second channel o/p is 10ns.


im  using spartan 3e kit and ise design suite 14.7


Thank you all

Author: Tim (Guest)
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Good Luck.

I am missing the question.

Author: bose (Guest)
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I want program to generate biphasic waveform. I'm unable to generate 
negative pulse. Biphasis is +1,-1 right

Author: FPGA-Expert (Guest)
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Since you are not even able to define precisely what you have, need and 
where is your misunderstanding, you should think of leraing something 
different than electronics.

Estimating you want to generate a symmetric voltage with the S3E eval 
kit, using the DACs (what you have not mentioned yet) I shall conclude, 
that you either need to add som offset to the DACs output value or need 
a bias loaded PWM driving the pins in oder to add offset eletronically.

AFAIK there is no negative voltage with the DACs of the S3E, so some 
additional cicuitry is required.

But hostly: WE did not have internet and not even usenet to learn about 
that all, and I more and more wonder how it is possible that there are 
engineers around who have done such things before, whithout the 
possibility to access knowledge already present(ed some where).

Author: Bose Chandran (Company: RD) (bosechandran)
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ok i try to learn it due to dead end i asked that above question. thanks

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