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Forum: FPGA, VHDL & Verilog help please.:)


Author: Atis (Guest)
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Hej.
I am very new in VHDL.
Can you help me to solv these exercises?

Author: Jan Henrik (janhenrik)
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Show us what you already came up with and we will help you answer open 
questions :)

Author: man of wisdom (Guest)
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Atis wrote:
> Hej.
> I am very new in VHDL.
> Can you help me to solv these exercises?

Relax, you do not need VHDL to solve these exercise, just basic 
knowledge about sequential logic.

Author: PittyJ (Guest)
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I have to go to work on monday.
Anyone here, who wants to help me?

Author: Jan Henrik (janhenrik)
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PittyJ wrote:
> I have to go to work on monday.
> Anyone here, who wants to help me?

Yep, but we wont do your homework for you...

Author: Lothar Miller (lkmiller) (Moderator)
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It's fairly easy: start with the work and if it doesn't go further on, 
then ask about a  particular problem. But no way with: who wants to do 
my school exercises?

Author: Daniel Abrecht (daniel-a)
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Tipp: The addition z=mod(a+b,2) is in fact the same as z=a xor b. You 
know the initial state of each variable. Just move the values according 
to the arrows and do the operations if they lead to an operator.

XOR:
a b z
0 0 0
1 0 1
0 1 0
1 1 0

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