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Forum: FPGA, VHDL & Verilog How to set Attribute noopt


Author: VHDLbeginner123 (Guest)
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Hallo, I have a question.
I have the code down in vhdl. I want to set the Attribute noopt for 
Precision, that there is no optimizing in this hierarchy. I have tried 
all the commented options, but Precision gives me always Mistakes or 
that he will ignore the attribute.
So how do I set it right?

ARCHITECTURE rtl OF ff_compare IS

   CONSTANT C_NUM_EN_LEN : POSITIVE := 16;
   CONSTANT C_NUM_EN     : POSITIVE := G_NUM_FF_LEN / C_NUM_EN_LEN;

   SIGNAL toggle : STD_LOGIC             := '0';  -- toggle SIGNAL
   SIGNAL ff_ar  : STD_LOGIC_VECTOR ((2* (C_NUM_EN+1))-1 DOWNTO 0);
   SIGNAL v_loop : UNSIGNED (2 DOWNTO 0) := "000";

   COMPONENT ff_enable
      GENERIC (
         G_FF_LEN : POSITIVE := C_NUM_EN_LEN
         );
      PORT (
         in_ff_enable  : IN  STD_LOGIC_VECTOR(1 DOWNTO 0);
         clk           : IN  STD_LOGIC;
         en_ff_enable  : IN  STD_LOGIC;
         out_ff_enable : OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
         );
   END COMPONENT;

--   ATTRIBUTE NOOPT              : BOOLEAN;
--   ATTRIBUTE NOOPT OF int_ff_enable_proc : COMPONENT IS TRUE;
   ATTRIBUTE NOOPT              : BOOLEAN;
   ATTRIBUTE NOOPT OF ff_enable : COMPONENT IS TRUE;

BEGIN
   int_ff_enable_proc : FOR i IN 0 TO C_NUM_EN-1 GENERATE

      -- Precision
      ATTRIBUTE hierarchy                       : STRING;
      ATTRIBUTE hierarchy OF inst_ff_enable     : LABEL IS 
"preserve_interface_block";
--      ATTRIBUTE NOOPT                           : BOOLEAN;
--      ATTRIBUTE NOOPT OF inst_ff_enable         : LABEL IS TRUE;
--      ATTRIBUTE NOOPT                           : BOOLEAN;
--      ATTRIBUTE NOOPT OF ff_enable         : component IS TRUE;

   BEGIN

      inst_ff_enable : ff_enable
         PORT MAP (
            clk           => clk,
            in_ff_enable  => ff_ar ((2*i)+1 DOWNTO 2*i),
            out_ff_enable => ff_ar((2*i)+3 DOWNTO (2*i)+2),
            en_ff_enable  => ff_drain_en_compare
            );

   END GENERATE int_ff_enable_proc;

END ARCHITECTURE rtl;

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