EmbDev.net

Forum: FPGA, VHDL & Verilog Error using Matlab HDL Coder


Author: Jamil Haider (jamil)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Hi, Can some one please help out.Thanks. I am trying to convert below 
code to VHDL using HDL Coder but getting error. The HDL Coder Block file 
is also attached .Please can you have a look on it and see whats the 
mistake in block diagram.
x1=[1 2 3 4 5 6 7 8 9];
x2=[3 4 5 6 7 8 9 2 1];
n=length(x1);
xc=zeros(2*n-1,1);
for i=1:2*n-1
  if(i>n)
      j1=1;
      k1=2*n-i;
      j2=i-n+1;
      k2=n;
  else
      j1=n-i+1;
      k1=n;
      j2=1;
      k2=i;
  end
  xc(i)=sum(conj(x1(j1:k1)).*x2(j2:k2));
end
xc=flipud(xc);


Error:

Cannot connect to model 'prc4'; please try Update Diagram (Ctrl-D).

Error due to multiple causes.

Errors occurred during parsing of MATLAB function 'MATLAB Function'(#24)

Error in port widths or dimensions. Output port 1 of 'prc4/MATLAB 
Function/u' is a one dimensional vector with 1 elements.

: Edited by Moderator

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.