# Forum: FPGA, VHDL & Verilog recursive average calculation

 Author: Timon (Guest) Posted on: 2015-08-27 10:24
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Hello,

I am trying to do linear regression (approximation) on current samples
that I receive from a SINC filter. The SINC filter has a clock of 20MHz
and the output(current sample) of the SINC filter block changes every
1.25 MHz. Now I need to use this data (whenever there is new value) to
do Linear regression which will have a clock of 160MHz. Can anyone give
me an idea on how to do linear regression on the samples only when there
is a new data(every 1.25MHz) from the SINC filter block??
To perform linear regression I need to find the average value of samples
recursively for which I would need to increment a counter whenever there
is new sample and reset to 0 after regression calculation, I also need
an idea on how to realise this counter??

I have the VHDL code for recursive averaging, the count is not
propererly implemented.

 Author: S. N. (higgns) Posted on: 2015-08-27 12:17

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You will have to implement a simple 2-way-handshake to hand over data
and guarantee their uniqueness between modules.

Further I'm not sure what you mean by "recursive average". I'm guessing
moving average in which case the easiest way is to use a FWFT FIFO.
Say you want to average the latest 32 data points:

 if in_valid = '1' then sum := sum + in_data; fifo_in <= in_data; fifo_we <= '1'; if count = 31 then sum := sum - fifo_out; fifo_re <= '1'; else count <= count + 1; end if; avg <= sum / 32; end if;

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