Hi all,

I am having problems booting up my Nios C code from EPCS. I am building 
my own FPGA board, not using a demo board. I'm using Quartus 15.0 and 
DE0 NanoBoard( Cyclone IV as FPGA)
My application contains:

1. Clock Source
2. Nios II Processor
3. System ID
4. JTAG UART
5. EPCS Serial Flash Controller
6. PIO
7. SDRAM Controller

I want to use SDRAM to store instructions and data for NIOS application. 
In the NIOS II Processor properties reset vector is set to base address 
of EPCS controller. Exceptions vector is set to base address to SDRAM. 
In the NIOS EDS for Eclipce I can debug my application, it works. Then, 
want to store the FPGA configuration data and the nios firmware in the 
EPCS following the steps below :

1) I generate the file.hex in NIOS terminal

2) Using Convert Programming Files in Quartus, I create a JIC file using 
the steps below:

2-a) Select EPCS64 (that is the flash chip i'm using)
2-b) Add SOF Page -> Page 0 -> Properties -> Address mode for selected 
pages: Set to START and Start Address = 0x0
2-c) Add file to SOF page: Add file.sof
2-d) Properties of file.sof select Compression
2-e) Add HEX data
2-f) Add File -> file.hex
2-g) Use absolute addressing offset( the offset was given in reset 
vector )

3) Generate JIC file -> NO issues.

4) Program EPCS device using Active Serial Programming. Add my JIC file. 
Programming succesful.

5) Power cycle my board. The hardware file starts, but the NIOS never 
boots?

So what is going wrong? I am programming using the USB Blaster. I am 
also not going through JTAG.

Any ideas?

Thanks in advance

Best regards