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Forum: FPGA, VHDL & Verilog getting started with fpga


Author: bebel (Guest)
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This is my first post so hello to all!

I'm just starting with fpga programming. I bought a cheap dev board from 
ebay:

Ebay-Artikel Nr. 400630255386

As an initial test I wanted to see if I can get the leds light up. I 
don't have board description so based on the wiring the leds are 
probably connected to 3 of the first 10 pins somewhere. So I wrote code 
to set these pins to 1 but they don't work. I tried with 0 too maybe if 
the leds are active low.

Output levels are set to LVTTL, as I see from the wiring all IO blocks 
get 3.3V. I supply it from 6V instead of 5 but that's not a problem as 
the stabilizer can handle it. JTAG threw me a "chain broken" message so 
I use AS mode. Tried restarting the board after programming. I use a 
chinese USB blaster with the newest 64bit win7 drivers and Quartus 6.

Does anyone have some ideas where might the problem be? Thanks!

Author: Long Tran Van (Company: Ha Noi- Vietnam) (longtv)
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Hi  bebel!

what is your HDL that you wrote leds module. i know verilog, if you want 
to code verilog, i can help you if you want, my skype: tv_long

: Edited by User
Author: bebel (Guest)
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The code is as simple as can be, that's why I didn't think it would be 
the cause:

entity fpga is
port(
  F1: out std_logic;
  F2: out std_logic;
  F3: out std_logic;
  F4: out std_logic;
  F5: out std_logic
);
end fpga;
architecture behv2 of fpga is
begin
    F1 <= '0';
    F2 <= '0';
    F3 <= '0';
    F4 <= '0';
    F5 <= '0';
end behv2;

Author: Karsten F. (Company: von Dänemark) (bingo600)
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Attached files:

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I have one of these boards

Here's the doc i have & 2 tests

Bingo

Author: Karsten F. (Company: von Dänemark) (bingo600)
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Ohh do remember you have an onboard OSC connected.
Quartus seems to default unused pins to : output driving GND
You might get a race with the unused FPGA Osc pin (GND) and the OSC at 
3.3v

You could either make a dummy vhdl statement using the the OSC , or tell 
Quartus to set unused pins as 3-stated inputs with weak pullups

/Bingo

: Edited by User
Author: bebel (Guest)
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Hey thanks Bingo, it works now!

1) The leds are active low so 0 had to be set.
2) Tri-stating unused pins helped, otherwise the leds are very dim.
3) I had to detach AS cable from the board to reboot from eprom. Earlier 
I only removed the power supply but it seems that's not necessary.

Cheers!

Author: Karsten F. (Company: von Dänemark) (bingo600)
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bebel wrote:
> 2) Tri-stating unused pins helped, otherwise the leds are very dim.
> Cheers!

That sounds like you had a problem with pins driving GND , and pulling 
your 3v3 down. Hope your Osc is ok.

You could try the tests in the zip , they use the Osc.

/Bingo

Author: bebel (Guest)
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Yes the led is blinking correctly with your test, thanks!

Author: Jordan (Guest)
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If you need additional learning material for VHDL and FPGA check out my 
course!
https://www.udemy.com/vhdl-and-fpga-development-fo...

Author: Verilogi (Guest)
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Do you think your course is qualified?

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