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Forum: FPGA, VHDL & Verilog Help for a beginner.


Author: ... ... (Company: vhdl) (aqibi2000)
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i need help creating a state table to produce a VHDL program.
 The system is built upon D type flip flips
The function of my program is to move between states in a sequence for 
example:
9, 2 , 6, 6, 1, 5, 2 and loop back to the beginning. Each transition 
needs to happen after 1 clock pulse. There is no other input to be 
characterised.

So state can possible be shown as:
A = 9
B = 2
C = 6
E = 1
F = 5

but the sequence the program must take is : 9,2,6,6,1,5,2 and loop

Many thanks, also help or drawings/diagrams would be very much 
appreciated.

Author: Ulrich Rinal (didididi)
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Search for state machines on the internet. there are at least several 
examples you could learn from.
simply post your code, which doesnt work, as you expect, by mentioning 
your development environment and target.

Author: ... ... (Company: vhdl) (aqibi2000)
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I've read several finite state machine examples and after failing to see 
how they can resemble with my system I finally gave in and decided to 
register here.

The reason I am not following with the examples online is because my 
system's only input is the clock, I am not feeding any other bits of 
data in to dictate the path the of the next state. Compared to all the 
examples I've seen they have when using a JK flip flop a J state and a K 
state or D type flip flop, a D state etc.

I cannot see beyond this.

I am more concerned about creating the state diagram and state table to 
then a transition table. I am well rehearsed in writing a VHDL program 
but cannot get a clear understanding of how to tackle my above problem.

Much appreciated.

Author: Achim S. (Guest)
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... ... wrote:
> The reason I am not following with the examples online is because my
> system's only input is the clock, I am not feeding any other bits of
> data in to dictate the path the of the next state.

So in the examples you read an external signal decided, what the next 
state should be.
i.e. something like
...
in state A:
if ext_signal='1' then
   next_state <= B;
else
   next_state<= C;
end if;

Well, if the next state does not depend on external signals, you can 
unconditionally code the next state.
In state A you assign next_state <= B
in state B you assign next_stae <= C
...

No need for any other signal than CLK (maybe a reset is helpful, if you 
want to start in a definded state).

In the beginning you wrote, that you want to go through the states in a 
sequence like 9,2,6,6,1,5

This sequence may represent the output of your state machine, but it may 
not be the sequence of the states itself. Cause it can not be, that the 
following state after state 6 is in one case 6, in another case 1. This 
would only be possible if you have external signals which tell you, if 
the following state after 6 should be 6 or 1.

For any state, which occurs more than once in your sequence, you have to 
differentiate the different occurences (you need e.g. a state 6a and a 
state 6b, which may both give you the same output 6).

... ... wrote:
> I am more concerned about creating the state diagram and state table to
> then a transition table.

What's the problem: draw a state diagramm with unconditional 
transistions.

Author: Schlumpf (Guest)
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A statmachine without inputs is a kind of counter.
A statemachine without outputs doesn´t make any sense :-)

So I think the numbers you have listed are the outputs of your 
statemachine.

The sequence 9,2,6,6,1,5,2 has seven states. Each state outputs a number 
on your output-signals.

e.g.

State    Output
A        9
B        2
C        6
D        6
E        1
F        5
G        2

You can code this in the "classic" way as statemachines are coded.
But if there are no inputs you can code a simple counter alternatively.
The counter starts at "0", counts up to "6" and starts again.
You can decode the output of the counter to get the proper 
output-signal.

e.g.

Counter  Output of decoder
0        9
1        2
2        6
3        6
4        1
5        5
6        2

if counter = 0 then
   output <= 9;
elsif counter = 1 then
   output <= 2;
...
end if;

Author: Aqib2000 .. (aqib2000)
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Okay great thanks, I know that works. But what would that look like as a 
circuit? To me, that looks like a counter, made of 3 jk or d type flip 
flops (for counting 0 to 6 so only 3 bits), which outputs into some 
logic circuit (the decoder) which outputs the final value? Because I've 
tried doing that, using excitation table/ karnough maps etc. to get the 
logic circuit of the decoder, but it's not been working, maybe I'm going 
about it wrong?

The other way I think it can work is a counter which feeds its outputs 
into a decoder into another set of flip flops which then output the 
final desired values. But that seems too long-winded to be right.


I would verily appreciate all and any input you can provide.

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