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Forum: FPGA, VHDL & Verilog interleaver/deinterleaver


Author: Maryam Zilaie (zilaie)
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hello
for my project i need a code of interleaver/deinterleaver completely, 
please help me.
thanks

Author: Lothar Miller (lkmiller) (Moderator)
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Maryam Zilaie wrote:
> for my project i need a code of interleaver/deinterleaver completely
What target? What language? What kind of "interleaver"?

> please help me.
"Help" is defined in a way, that you show something, then you 
report, what problems you encounter with that code. So, lets try it 
that way. No one is intended to do your homework solely...

Author: Maryam Zilaie (zilaie)
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this code is just for clk, i need complete code, please give me a comple 
code for interleaver / deinterleaver.
thaks alot

Author: Maryam Zilaie (zilaie)
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my homework isn't just this code i have to change this becase this is 
just a little part of a big project.
thanks

Author: Maryam Zilaie (zilaie)
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excuse me, now i understand your mean but i dont know about interleaver 
that much, i dont know if there are several kind of interleaver, the 
language is VHDL and i want to implemente an adress generator in 
interleaver for IEEE 802.22
can you guide me to understand them? if ther is any book or site, please 
give me to read them.
thanks alot

Author: The world's best FPGA-Pongo (Guest)
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Do your homework alone and describe a solution to your teacher. As soon 
as you silently start to take help different than from you teacher to 
overcome your limits, you start to pretend to be able to do something 
towards your teacher which is not right. You will run into a kind of 
spiral which requires to take help again and again because you missed 
the first steps. Afterwards you cannot do anything yourself at all. We 
have enough people like you, sorry.

I major thing when starting to work like this is to learn to describe 
issues to afters and also to yourself. If you cannot do this, you will 
never be able to think of Solutions.

Sorry for this large pieca of philosophy but this is the truth.

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