EmbDev.net

Forum: FPGA, VHDL & Verilog MACHXO2 - accessing Wishbone EFB i2c from Verilog?


Author: Kenny Millar (kennym)
Posted on:

Rate this post
0 useful
not useful
I am quite new to FPGA and I'm using MachXO2 and the Lattice MachXO2 
breakout board.

I am trying to get my head around interfacing the the MachXO2's i2c EFB 
using Wishbone.

I've done a bit of searching around on the Lattice website and with 
google, and can find lots of documentation about the EFB registers and 
so on, and even some examples - but they use the Lattice Mico soft 
processor.

I have used IPExpress to generate the ipx file for an I2C "Primary 
User", but I'm not sure how to use it.

I see someone on here has done a very similar thing using VHDL, but I 
would like to use verilog as far as possible.

Can anyone point me to an example of accessing the Wishbone I2C efb from 
verilog, without using the Mico soft processor?

Author: Ale (Guest)
Posted on:

Rate this post
0 useful
not useful
Did you try the example in this link ?

http://latticesemi.com/view_document?document_id=45881

It is an example for i2c master and slave, it doesn't use the Mico uP.
I think that you have problems using a wishbone interface, there are 
some docs about it, I think that I have seen something around opencores.

Author: Holger (Guest)
Posted on:

Rate this post
0 useful
not useful
This is a thread of my Project and Doc. pdf ect. with pictures for the 
Machxo2 Hardened Core to the EFB and the i2c Bus ...
Beitrag "Probleme bei Lattice I2C EFB mit Wishbone Interface"

Greetings Holger.

Author: Kenny Millar (kennym)
Posted on:

Rate this post
0 useful
not useful
Thanks!

Author: Kenny Millar (kennym)
Posted on:

Rate this post
0 useful
not useful
Ale wrote:
> Did you try the example in this link ?
>
> http://latticesemi.com/view_document?document_id=45881
>
> It is an example for i2c master and slave, it doesn't use the Mico uP.
> I think that you have problems using a wishbone interface, there are
> some docs about it, I think that I have seen something around opencores.

Thank you, I had not found that project on the lattice website. It is 
helpful.

Author: Holger (Guest)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Kenny Millar wrote:
> Thank you, I had not found that project on the lattice website. It is
> helpful.
Hint:
Google for Lattice IP Catalog, and google for Machxo2 Pico Developer 
Kit.

First i build a state-engine,
for a I2C Master with a (Machxo2-Hardended Core via WBONE-Bus).
Hint:
You can Simulate the I2C-Bus via the ALDEC simulator.
Greetings Holger.

Author: Kenny Millar (kennym)
Posted on:

Rate this post
0 useful
not useful
Holger wrote:
> Kenny Millar wrote:
>> Thank you, I had not found that project on the lattice website. It is
>> helpful.
> Hint:
> Google for Lattice IP Catalog, and google for Machxo2 Pico Developer
> Kit.
>
> First i build a state-engine,
> for a I2C Master with a (Machxo2-Hardended Core via WBONE-Bus).
> Hint:
> You can Simulate the I2C-Bus via the ALDEC simulator.
> Greetings Holger.

Thank you - this is all very helpful.

-Kenny

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.