# Forum: FPGA, VHDL & Verilog Calculate Sum of (z[n])^2 in VHDL

 Author: Eric Thompson (madz) Posted on: 2014-09-18 16:36

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I want to calculate the Sum of (z[n])^2 in VHDL. If the signal z is
represented in 2's complement with b bits and I want to calculate the
power of groups of N samples!

Thank you!:)

: Edited by User
 Author: Lothar Miller (lkmiller) (Moderator) Posted on: 2014-09-18 16:38

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Eric Thompson wrote:
> I want to calculate the Sum of (z[n])^2 in VHDL.
> If the signal z is represented in 2's complement with b bits.
And what's the problem with that?
What is z? What n? Where do they come from?

 Author: Eric Thompson (madz) Posted on: 2014-09-18 16:46

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Lothar Miller wrote:
> Eric Thompson wrote:
>> I want to calculate the Sum of (z[n])^2 in VHDL.
>> If the signal z is represented in 2's complement with b bits.
> And what's the problem with that?
> What is z? What n? Where do they come from?

Z is just the outsignal and n is the groups of samples(forgot to write
it so edited my first post)

And the problem is I need help to code this.

 Author: Colibri (Guest) Posted on: 2014-09-19 00:41

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This is not a VHDL issue. What you first need is a concept of a circuit.
You have to use a counter, start stop conditions, a resetable
accumulator and somewhere a multiplier. If you do not see the circuit
required, FPGA is not your business

 Author: Lothar Miller (lkmiller) (Moderator) Posted on: 2014-09-19 07:36

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Eric Thompson wrote:
> Z is just the outsignal and n is the groups of samples
And where are they located? Where and how do the "samples" come from?
Are they already stored in a RAM? Or is one sample generated each clock?

> And the problem is I need help to code this.
What hardware do you have? Or is it just for simulation?

> And the problem is I need help to code this.
The actual problem is, that VHDL is a hardware description language.
And to describe somthing you must have a "picture" or some imagination
of your target hardware. Do you?

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