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Forum: FPGA, VHDL & Verilog step time simulation


von angelo (Guest)


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Hi all,

I'm stuck on a simple issue but can't get out of it: I would like to 
generate severals waveform signals for my future testbench but the 
frequency of my signals are not correct.

Below is the code I want to simulate:
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library ieee;
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use ieee.std_logic_1164 .all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_unsigned.all;
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use ieee.math_real.all;
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entity triangle_generator is
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 generic(AMP: real;
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  OFFSET: real;
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  FREQ: real;
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  PHASE :real);
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 port(wave1: out real);
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end triangle_generator;
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architecture archi of triangle_generator is
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signal tmp1 : real := 0.0;
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begin
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 P1:process
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 constant delta   : real := 1000.0e-12;
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 constant fin  : time := 1000 ps;
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 variable angle   : real := 0.0;
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 variable t    : real := 0.0;
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 variable PHASE_RAD : real := 0.0;
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 begin
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   PHASE_RAD := (math_2_pi * PHASE)/360.0;
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  loop
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   angle   := math_2_pi * FREQ * t;
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   t := t + delta;
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   tmp1 <= OFFSET+(AMP/2.0)*(2.0/math_pi)*arcsin(sin(angle));
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   wait for fin;
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  end loop;
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  wait;
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 end process P1;
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 wave1 <= tmp1;
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end archi;

When I simule this code with FREQ=100 000 000 Hz I get the waveform in 
attachment, not really what I wanted. So I was thinking, if I write 
delta = 1000.0e-15 maybe it will be right, but absolutly not. When I 
change the value of delta, the frequency of the waveform is wrong.

So can you help me to get through this please?

von Lothar M. (Company: Titel) (lkmiller) (Moderator)


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angelo wrote:
> When I change the value of delta, the frequency of the waveform is
> wrong.
You are turning the wrong screw...

Think about this:
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 constant fin  : time := 1000 ps;
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 :
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     wait for fin;
What is the cycle time of 100MHz?
How many 1ns steps will fit in 10ns?
Do you find any coincidence with your screenshot?

: Edited by Moderator
von angelo (Guest)


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Hi! Thanks! Your advices help me a lot.

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