# Forum: FPGA, VHDL & Verilog the Quotient is floating point

 Author: ddden (Guest) Posted on: 2014-03-23 01:23

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hi
i want to divide two numbers and i know the Quotient will be float point
such as (0.3456)  how can i describe the Quotient in vhdl code.sorry but
i am new in vhdl

 Author: Lothar Miller (lkmiller) (Moderator) Posted on: 2014-03-23 16:42

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Is this 0.3456 a constant number?

ddden wrote:
> the Quotient will be float point
Why? Where does this quotient come from?

: Edited by Moderator
 Author: ddden (Guest) Posted on: 2014-03-23 17:54

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Lothar Miller wrote:
> Is this 0.3456 a constant number?
no it is variable .
> Why? Where does this quotient come from?
when i try to divide 8/12=0.666666
the two inputs are integer and the quotient is being float
is there a way to define this floating result such as make the output
define is float or including floating library first.

 Author: Lothar Miller (lkmiller) (Moderator) Posted on: 2014-03-23 22:05

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ddden wrote:
> including floating library first.
You must keep in mind, that floating point numbers are not
synthesizeable up to now.
Maybe you can work with fixed point arithmetics.

You did not answer my question! Be sure, that I know, that 8/12 results
in a number which cannot be packed into an integer.
But I wanted to know from where those numbers come and what you want to
achieve with this calculation in the end...

 Author: ddden (Guest) Posted on: 2014-03-24 00:07

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Lothar Miller wrote:

> You must keep in mind, that floating point numbers are not
> synthesizeable up to now.
> Maybe you can work with fixed point arithmetics.
ok, then how i can convert float to fixed point,that is easy

> But I wanted to know from where those numbers come and what you want to
> achieve with this calculation in the end...

if i understand correct the two numbers come from another operation and
i want to divide them and also the result from the division i will use
it in another operation such as add it with another floating value.

 Author: Lothar Miller (lkmiller) (Moderator) Posted on: 2014-03-24 07:36

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ddden wrote:
> i will use it in another operation such as add it with another floating
> value.
Just to repeat my statement: you will not be able to get float
operations synthesized. Don't spend one more thought on floating point
arithmetics in VHDL.

ddden wrote:
> if i understand correct the two numbers come from another operation
For sure.
> and i want to divide them and also the result from the division
> i will use it in another operation
Which is a incredibly secret one!
> such as add it with another floating value.
To keep it short: I'm pretty sure that you don't need floating point
arithmetics at all. You just didin't figure that out because all of your
thoughts are "float"-ing in the wrong direction.

Just to clearify my question:
WHAT kind higly secret of apparatus or machine do you build? What data
rates are inside this machine? What part of work inside this machine is
yours?

: Edited by Moderator
 Author: ddden (Guest) Posted on: 2014-03-24 19:39

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Lothar Miller wrote:

> Just to clearify my question:
> WHAT kind higly secret of apparatus or machine do you build? What data
> rates are inside this machine? What part of work inside this machine is
> yours?
really i found this code in another forum (
i want to divide two numbers(16-bit binary) in VHDL Numerator is an
integer. Denominator is a float. Result should be float. What algorithm
do i use to perform the division)
and the suggestion solution is
 library ieee; use ieee.numeric_std.all; use ieee.float_pkg.all; entity integer_by_float_division is port ( numerator: in signed(15 downto 0); denominator: in signed(15 downto 0); result: out float(6 downto -9) ); end; architecture rtl of integer_by_float_division is subtype float16 is float(6 downto -9); signal numerator_float: float16; signal denominator_float: float16; begin numerator_float <= to_float(numerator, numerator_float); denominator_float <= to_float(denominator, denominator_float); result <= numerator_float / denominator_float; end;
this solution is to convert the numerator and denominator into float
value before division operation.
should i did it too if the numerator and denominator are integer and the
out put is float ??
and sorry for any mistakes .
thanks a lot

 Author: PittyJ (Guest) Posted on: 2014-03-25 07:25

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I have the feeling, that you does not like the previous answers and
ignores them.

Again:
Forget float operations in VHDL, if you want to generate code for FPGA.
Even forget the division.

If you realy need heavy mathematics, do it on an microprocessor ( either
hard or softcore).

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