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Forum: FPGA, VHDL & Verilog online receive bmp tp fpga


von Abdallah  . (Company: Home) (my_name)


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hi, is it possible for the on-line acquisition of bmp image in fpga?

von positive thinker (Guest)


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yes!

von Abdallah  . (Company: Home) (my_name)


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okay, wonderful
what steps should I respect to do that (just keywords and I'll make my 
researches)
........... thanks

von PittyJ (Guest)


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You have to configure the pins of the FPGA to accept input. Then you can 
acquiere every format you want with nearly every interface you might 
have.

By the way: you should better know, on what interface and pins the image 
arrives to your FPGA.

von Abdallah  . (Company: Home) (my_name)


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PittyJ wrote:
> By the way: you should better know, on what interface and pins the image
> arrives to your FPGA.

what interface can I use on spartan 3a 1800a?

von PittyJ (Guest)


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Possible configurations you can find in the datasheets from Xilinx. For 
example:
http://www.xilinx.com/support/documentation/data_sheets/ds529.pdf

Spartan-3A FPGAs support the following single-ended
standards:
• 3.3V low-voltage TTL (LVTTL)
• Low-voltage CMOS (LVCMOS) at 3.3V, 2.5V, 1.8V,
1.5V, or 1.2V
• 3.3V PCI at 33 MHz or 66 MHz
• HSTL I, II, and III at 1.5V and 1.8V, commonly used in
memory applications
• SSTL I and II at 1.8V, 2.5V, and 3.3V, commonly used
for memory applications
Spartan-3A FPGAs support the following differential
standards:
• LVDS, mini-LVDS, RSDS, and PPDS I/O at 2.5V or
3.3V
• Bus LVDS I/O at 2.5V
• TMDS I/O at 3.3V
• Differential HSTL and SSTL I/O
• LVPECL inputs at 2.5V or 3.3

Also you find the RAM. The largenst one has 576 KBit, meaning 72 KByte.
This should be sufficient to store a BMP image of 120 x 200 (RGB).

von Abdallah  . (Company: Home) (my_name)


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that's wonderful, thank you very much  PittyJ for your help

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