1 | library IEEE;
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2 | use IEEE.STD_LOGIC_1164.ALL;
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3 | use IEEE.STD_LOGIC_ARITH.ALL;
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4 | use IEEE.NUMERIC_STD.ALL;
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5 | use STD.TEXTIO.ALL;
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6 | library WORK;
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7 | use WORK.pkgg.ALL;
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8 | entity scrambler is
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9 | Port ( e : in STD_LOGIC_VECTOR (29 downto 0);
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10 | Sel : in STD_LOGIC_VECTOR (3 downto 0);
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11 | s : out STD_LOGIC_VECTOR (29 downto 0));
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12 | end scrambler;
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13 | architecture Behavioral of scrambler is
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14 |
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15 | SIGNAL rst_n : std_logic;
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16 | SIGNAL clk : std_logic;
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17 | SIGNAL dout : std_logic_vector(29 downto 0);
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18 |
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19 | CONSTANT width : integer := 30;
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20 | CONSTANT length : integer := 31; -- length of the register
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21 | CONSTANT taps : T_LFSR_TAPS16 := (31, 27, 26, 25, 22, 21, 19, 18, 17, 16, 10, 7, 6, 5, 3, 2);
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22 |
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23 | component genlfsr
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24 | generic (
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25 | width : integer := 30;
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26 | length : integer := 31;
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27 | taps : T_LFSR_TAPS16 := (31, 27, 26, 25, 22, 21, 19, 18, 17, 16, 10, 7, 6, 5, 3, 2)
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28 | );
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29 |
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30 | port (
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31 | rst_n : in std_logic;
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32 | clk : in std_logic;
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33 | dout : out std_logic_vector(29 downto 0)
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34 | );
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35 | end component;
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36 |
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37 | bgin
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38 |
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39 | U1: entity work.genlfsr(behavioral)
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40 | generic map (width => width ,length => length ,taps => taps)
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41 | port map(rst_n => rst_n ,clk => clk ,dout =>dout);
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42 |
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43 | process (dout ) is
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44 |
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45 | begin
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46 |
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47 | s(29 downto 29-dout'high) <= dout;
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48 |
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49 | end process;
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50 | end Behavioral;
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