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Forum: FPGA, VHDL & Verilog Process to combinational circuits?


Author: verilogin verilogin (verilogin)
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I see many codes that use VHDL process in the combinational. Why is this 
so common? Why not use constructs suitable for combinational circuits 
instead of using process as often?

Everything that can be done with the process can be done without the 
process when it comes to combinational, is not it? So what is the 
justification?

Author: Duke Scarring (Guest)
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verilogin verilogin wrote:
> So what is the
> justification?
Readability and maintenance.

Duke

Author: Lothar Miller (lkmiller) (Moderator)
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verilogin verilogin wrote:
> Everything that can be done with the process can be done without the
> process when it comes to combinational, is not it? So what is the
> justification?
Lots of VHDL "programmers" did software programming previously. And to 
plenty of them a VHDL procedure looks like a C or BASIC subroutine. And 
so every functionality is wrapped in its own process...

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