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Forum: FPGA, VHDL & Verilog error in package call


Author: Harry saluja (harry27)
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i made a package using VHDL the ran check syntax it was successful, but 
when i use it in my code following error appears

Library unit pack is not available in library work.
WARNING:HDLParsers:3481 - Library work has no units. Did not save 
reference file "xst/work/hdllib.ref" for it.

what should i do?

Author: Lothar Miller (lkmiller) (Moderator)
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>  but when i use it in my code following error appears
How do you use it?

Author: Harry saluja (harry27)
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use work.pack.all

pack is name of my package

Author: Lothar Miller (lkmiller) (Moderator)
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Please read your post and imagine, that no one knows anything about 
what you are doing. Neither anybody knows anything with what toolchain 
you are working. And even so no one knows what part of the unknown 
toolchain reports that error to you when you do anything unknown. You 
see the problem?

And to ease any help:
post your vhdl file(s) as attachment(s) with ending *.vhl or *.vhdl.

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