EmbDev.net

Forum: FPGA, VHDL & Verilog Interrupt handling with VHDL


Author: vikram bashyam (bashyamvikram)
Posted on:

Rate this post
0 useful
not useful
Hallo all,

I am writing interputs for a fpga and dsp need to interact with a dual 
port memory shared dpram control in vhdl.
I have External IOs coming from the SPI bus on oneside to the fpag to be 
communicated with dsp and on the otherhand have a camera to the to the 
dsp.
So my intrups are like Havinf a FIFO being reset after everytime a FSM 
reads and writes the interrpts with dsp.

Now my problem is
1) I want to enable some particular interupts at a time and disable the 
others.
2)When make a masking with logical XOR function the other interupts 
coming from UART goes for a timeout.
3)When this is done the camera gets the signal but cant be controlled.

I use the following algorithm to deal with all asynchron inputs:
1. In event2reg_array_proc: save all inputs to parallel buffers 
“fifo_data_input_array”, each input(flag) should be put into separate 
buffer.
2. In reg_array2fifo_proc2: read each buffer serially and save them in a 
fifo “fifo320x32”.
3. In main FSM read the output from fifo and do the suitable processing, 
each cycle read out only one value, it should be one flag.

If you get some flags which remains in register even after processing, 
the reason can be:
1. In event2reg_array_proc: and reg_array2fifo_proc2:, if one flag (in 
buffer) has been written in the fifo, it should be cleared from the 
buffer. I use the “fifo_cnt” to control this. You can use simulation to 
check.
2. Line Camera sends the FRAME_VALID signal as same as the LINE_VALID 
signal, so you can get a lot of CAM2DSP_FRAME_SYNC_FLAG with Line 
Camera.


So can any one suggest any algorithm to enable particular interupts 
while the the camera is still communicating with DSP.

Author: vikram (Guest)
Posted on:

Rate this post
0 useful
not useful
I would like to put the question other way round.
How to enable a particular interrupt in a FSM with case statement, and 
the interrupts are coming as Std_logic_vector?

How to enable or disable a flag in a 64 bit in a FSM??

Author: giz (Guest)
Posted on:

Rate this post
0 useful
not useful
& bitmask

Author: Shriniwash (Guest)
Posted on:

Rate this post
0 useful
not useful
What do you mean with "interrupt" anyway? A FPGA has no interrupts...

Author: vikram (Guest)
Posted on:

Rate this post
0 useful
not useful
Interurpt is to enable or disable a particular flag

Author: Shriniwash (Guest)
Posted on:

Rate this post
0 useful
not useful
Seems like you have no idea what you're talking about

Author: Bronce (Guest)
Posted on:

Rate this post
0 useful
not useful
An interrupt would be something that interrupts something, like the 
sequential program flow on a CPU.
A state machine is something that resides in a certain state unless 
there are conditons which make it go into a different state. You cannot 
interrupt a state, as a consequence you cannot interrupt a state 
machine.
All you can do is change a condition, so the state machine would switch 
into a different state.

Author: vikram (Guest)
Posted on:
Attached files:

Rate this post
0 useful
not useful
A SPI bus has to send the UART and SPI signal to the DSP from the FPGA 
memory thats what i mean by interrupts.

On the otherhand a camera also has to get Camera link signals from the 
DSP from the FPGA.

For his i have a dualport ram with one side fpga and the other side the 
DSP.

I have used a FIFO to read these signal and send them to the FPGA.

Here i use a simple state machine to write the flags status, write and 
read the flags.

Now my question is to read and write some flags instead of all of them.

For this used the AND and XOR operation on this to mask,but the problem 
is it being a 64 bit vector and the uart goes for a timeout for which 
the camera resposnse stops after get intial 2 to 3 packets as they get 
masked.

So i want to read some values and keep off the others.

Author: Shriniwash (Guest)
Posted on:

Rate this post
0 useful
not useful
I never get your point.
A SPI bus is an interrupt and interrupts a state machine but all you 
want to do is to mask some bits but the UART goes into timeout?
I want to build a space ship - where do I start and how do I drill a 
hole into wood?

Author: Lance (Guest)
Posted on:

Rate this post
0 useful
not useful
Use DMA instead of Interrupt!
This will also fix your UART problems.

Author: vikram (Guest)
Posted on:

Rate this post
0 useful
not useful
Thanks Lance....i think you got what i was trying to say...I will try to 
do will DMA in the DSP.

Author: Lance (Guest)
Posted on:

Rate this post
0 useful
not useful
Not in the DSP, stupid, in the FPGA of course!

Author: Shriniwash (Guest)
Posted on:

Rate this post
0 useful
not useful
Maybe his FPGA does not have DMA.

@vikram: does your FPGA has inbuilt DMA?

Author: vikram (Guest)
Posted on:

Rate this post
0 useful
not useful
My FPGA doesnt have a DMA on it. its Lattice ECP2..

Author: Lance (Guest)
Posted on:

Rate this post
0 useful
not useful
Hard luck

Author: vikram (Guest)
Posted on:

Rate this post
0 useful
not useful
I am downloading a DMA IP which has a wishbone controller in it.

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.