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Forum: FPGA, VHDL & Verilog error (12007) top-level design entity "projet" is undefined


Author: Lpsyco Lpsyco (Company: Haha) (lpsyco)
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HELLO;

I use Quartus II web version 12.0 sp2 web edition to encode small 
program the order of TPs.
when I compile the file itself with "Analyze Current File", everything 
goes well without error.
But when I compile the whole project, I get this error:

error (12007) top-level design entity "project" is undefined

Thank you for helping me to solve this problem.

Author: user (Guest)
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you have to select the toplevel vhdl file, right click -> set as 
toplevel

Author: mandakini (Guest)
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Iam using Quartus 12.1 web edition to compile a simple helloworld.v file 
and get the following error.Cannot find toplevel.v file.Please help.

Error (12007): Top-level design entity "helloworld" is undefined

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