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Forum: FPGA, VHDL & Verilog Ko counter in Test Bench


Author: imed m. (imed_m)
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Hi!
What's the best way to handle KO number in test benches?
- manually increment a counter inside TB code?
- do all the checks through a procedure which increment the err_cnt as a 
shared variable ?
- what to do if you have, besides your TB, an assertions module that is 
active all the time ? same issue when you have a comparison module that 
is run at the end of your tests
all these modules are activated in parallel to the main TB and they may 
return Ko as well.

If you have an answer to any of these questions I would be thankful.

Author: Duke Scarring (Guest)
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> What's the best way to handle KO number in test benches?
Maybe you describe at first what does im mean: "KO number"

Duke

Author: imed m. (imed_m)
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I meant number of errors:
Number of test failure.
I suppose you know what it means if you worked on design verification 
based on requirements

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