Forum: FPGA, VHDL & Verilog Round Robin Arbiter

Author: nick kolivas (Company: university) (tonionio)
Posted on:

Rate this post
0 useful
not useful
Hello there guys!

Could someone please give me an explanation for the following code I 
have found of a Round robin Arbiter?

http://www.asic-world.com/examples/vhdl/arbiter.html This is the code!

I cannot understand what is the use of the internal registers and what 
do their names mean!In addition I cannot quite understand the structure 
of the architecture with the "not" and in addition with the masks later 

Please give me an explanation.

With regards



Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]

Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.