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Forum: FPGA, VHDL & Verilog error:606 in xilinx ise


Author: dhruv mulmule (dhruv)
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hi,
   I am getting the simulator error:606.it says something about the 
specific coding constructs and that xilinx is working on it.the complete 
code has passed the 'check syntax' process.Plz tell me,how can i deal 
with this problem?

Author: Lothar Miller (lkmiller) (Moderator)
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> it says something
You're writing something like:
I have a kind of an error, whats the problem?

> about the specific coding constructs
Whats the EXACT error message belonging to EXACT which code produced by 
EXACT what toolchain?

> and that xilinx is working on it.
At least here one can hope that you are using the Xilinx ISIM. Right?

Author: dhruv mulmule (dhruv)
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hi,
    Sorry for the inadequate information.In this reply i have attached 
the
code which is of a D-f/f and the tb for it.
I am using the Xilinx-ISIM.
The complete code has passed the 'check syntax' process.But during 
simulation the isim gives an error message which is as follows:

Simulator:606 - ISE Simulator is unable to compile this design due to
   specific coding constructs used in design unit work/dff_1/ff, defined 
in file
   "C:/project/Project/save proj_2/sseerr/ssseeeerrr.vhd". Xilinx is 
actively
   working on reducing the number of conditions where this error occurs. 
For
   more information on this error, please consult Answer Record 24068 in 
Answers
   Database at http://www.xilinx.com/support.

What changes do i have to make in my code to successfully simulate it?
I have seen the answer record 24068 but the problems mentioned there 
seem different.
I hope that,now, the problem is clear.
Thanks.

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