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Author: Omar Saif (omar-saif)
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Dear All,
i wanna to understand this vhdl code please,

signal x,y : bit_vector(0 to 7);
A_loop: for i in x'range loop
b_loop: for j in y'range loop
next a_loop when i<j;
end loop b_loop;
end loop a_loop;

thanks,

Author: Lothar Miller (lkmiller) (Moderator)
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> i wanna to understand this vhdl code please
> next a_loop when i<j;
You cannot understand anything, because this code makes no sense!
Its incomplete, something is missing...

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