# Forum: FPGA, VHDL & Verilog VHDL fast fourier transform butterfly architecture problem.

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 13:33

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Hello,

So this is my code for the butterfly architecture of my
program.......... when compiled it says : component(40): "add":
expecting ';'

component(41): "sub": expecting ';' and it continues so on for all the
other components..........

my code is as follows:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.fft_pkg.all;

entity butterfly is
port(
s1,s2 : in comp_array; --inputs
w :in comp_array; -- phase factor
x1_out,x2_out :out comp_array -- outputs
);
end butterfly;

architecture Behavioral of butterfly is

signal xxx : integer := 0;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

function add (x1,x2,x3 : comp_array) return comp_array;
function sub (x1,x2,x3 : comp_array) return comp_array;
function mult (x1,x2,x3 : comp_array) return comp_array;
begin

--butterfly equations.
process

function add (x1,x2,x3 : comp_array) return comp_array is

function sub (x1,x2,x3 : comp_array) return comp_array is

function mult (x1,x2,x3 : comp_array) return comp_array is

begin
--1st stage equations:
x1(0) := s(0) add (s(4) mult w);
x1(1) := s(0) sub (s(4) mult w);
x1(2) := s(2) add (s(6) mult w);
x1(3) := s(2) sub (s(6) mult w);
x1(4) := s(1) add (s(5) mult w);
x1(5) := s(1) sub (s(5) mult w);
x1(6) := s(3) add (s(7) mult w);

--2nd stage equations:
x2(0) := x1(0) add (x1(2) mult w(0));
x2(2) := x1(0) sub (x1(2) mult w(0));
x2(3) := x1(1) add (x1(3) mult w(2));
x2(1) := x1(1) sub (x1(3) mult w(2));
x2(6) := x1(4) add (x1(6) mult w(0));
x2(4) := x1(4) sub (x1(6) mult w(0));
x2(7) := x1(5) add (x1(7) mult w(2));
x2(5) := x1(5) sub (x1(7) mult w(2));

--3rd stage equations:

x3(0) := x2(0) add (x2(4) mult w(0));
x3(4) := x2(0) sub (x2(4) mult w(0));
x3(1) := x2(1) add (x2(5) mult w(1));
X3(5) := x2(1) sub (x2(5) mult w(1));
x3(2) := x2(2) add (x2(6) mult w(2));
x3(6) := x2(2) sub (x2(6) mult w(2));
x3(3) := x2(3) add (x2(7) mult w(3));
x3(7) := x2(3) sub (x2(7) mult w(3));

end process;

end Behavioral;

Much appreciated if you could help me please anyone..........

 Author: Duke Scarring (Guest) Posted on: 2012-04-16 14:18

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The function definitions are missing:
 function add (x1,x2,x3 : comp_array) return comp_array is function sub (x1,x2,x3 : comp_array) return comp_array is function mult (x1,x2,x3 : comp_array) return comp_array is 

Can you show us fft_pkg please?
 -- Loading package STANDARD -- Loading package TEXTIO -- Loading package std_logic_1164 -- Loading package MATH_REAL ** Error: (vcom-11) Could not find work.fft_pkg. 

Duke

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 15:05

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but i put the definitions after the process.........

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 15:07

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so fft_pkg is as follows :

library IEEE; -- library name and library use clause
use IEEE.std_logic_1164.all; -- specifies multi level logic system
use IEEE.MATH_REAL.ALL;

package fft_pkg is

type complex is
record
r : real;
i : real;
end record;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

function add (n1,n2 : complex) return complex;
function sub (n1,n2 : complex) return complex;
function mult (n1,n2 : complex) return complex;

end fft_pkg;

package body fft_pkg is

function add (n1,n2 : complex) return complex is

variable sum : complex;

begin
sum.r:=n1.r + n2.r;
sum.i:=n1.i + n2.i;
return sum;

--subtraction of complex numbers.
function sub (n1,n2 : complex) return complex is

variable diff : complex;

begin
diff.r:=n1.r - n2.r;
diff.i:=n1.i - n2.i;
return diff;
end sub;

--multiplication of complex numbers.
function mult (n1,n2 : complex) return complex is

variable prod : complex;

begin
prod.r:=(n1.r * n2.r) - (n1.i * n2.i);
prod.i:=(n1.r * n2.i) + (n1.i * n2.r);
return prod;
end mult;

end fft_pkg;

 Author: Duke Scarring (Guest) Posted on: 2012-04-16 15:54

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Ok. Now I can completly reconstruct your situation:
 \$ vcom butterfly.vhd Model Technology ModelSim PE vcom 10.1 Compiler 2011.12 Dec 6 2011 -- Loading package STANDARD -- Loading package TEXTIO -- Loading package std_logic_1164 -- Loading package MATH_REAL -- Loading package fft_pkg -- Compiling entity butterfly -- Compiling architecture Behavioral of butterfly ###### butterfly.vhd(40): x1(0) := s(0) add (s(4) mult w); ** Error: butterfly.vhd(40): near "add": expecting ';' 

> but i put the definitions after the process.........
It seems you need some VHDL basic syntax:
http://www.ics.uci.edu/~jmoorkan/vhdlref/function.html
http://tams.informatik.uni-hamburg.de/research/vlsi/vhdl/


 --1st stage equations: x1(0) := s(0) add (s(4) mult w); 
Where is s defined?
Which type has w?

Duke

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:06

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hello duke,

any chance you can propose me with a model for the line

x1(0) := s(0) add (s(4) mult w);

i'd be really grateful my friend............. Please, it's a project and
i really need this........

 Author: Duke Scarring (Guest) Posted on: 2012-04-16 16:09

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> any chance you can propose me with a model for the line
Yes.

> Where is s defined?
> Which type has w?

Duke

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:12

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Dear Duke,

but the problem still exists

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.fft_pkg.all;

entity butterfly is
port(
s1,s2 : in comp_array;      --inputs
w :in comp_array;      -- phase factor
x1_out,x2_out :out comp_array      -- outputs
);
end butterfly;

architecture Behavioral of butterfly is

signal xxx : integer := 0;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

function add (x1,x2,x3 : comp_array) return comp_array;
function sub (x1,x2,x3 : comp_array) return comp_array;
function mult (x1,x2,x3 : comp_array) return comp_array;
begin

--butterfly equations.
process

function add (x1,x2,x3 : comp_array) return comp_array is

function sub (x1,x2,x3 : comp_array) return comp_array is

function mult (x1,x2,x3 : comp_array) return comp_array is

begin
--1st stage equations:
function sub (x1,x2,x3 : comp_array) return comp_array is
variable diff : comp_array;

x1(1) := s(0) sub; (s(4) mult w);

x1(3) := s(2) sub; (s(6) mult w);

x1(5) := s(1) sub; (s(5) mult w);

--2nd stage equations:

x2(2) := x1(0) sub (x1(2) mult w(0));

x2(1) := x1(1) sub (x1(3) mult w(2));

x2(4) := x1(4) sub (x1(6) mult w(0));

x2(5) := x1(5) sub (x1(7) mult w(2));

--3rd stage equations:

x3(4) := x2(0) sub (x2(4) mult w(0));

X3(5) := x2(1) sub (x2(5) mult w(1));

x3(6) := x2(2) sub (x2(6) mult w(2));

x3(7) := x2(3) sub (x2(7) mult w(3));
return diff;
end sub;

--1st stage equations:
function add (x1,x2,x3 : comp_array) return comp_array is
variable sum : comp_array;

x1(0) := s(0) add (s(4) mult w);
x1(2) := s(2) add (s(6) mult w);
x1(4) := s(1) add (s(5) mult w);
x1(6) := s(3) add (s(7) mult w);
--2nd stage equations (sum):
x2(0) := x1(0) add (x1(2) mult w(0));
x2(3) := x1(1) add (x1(3) mult w(2));
x2(6) := x1(4) add (x1(6) mult w(0));
x2(7) := x1(5) add (x1(7) mult w(2));
--3rd stage equations(sum):
x3(0) := x2(0) add (x2(4) mult w(0));
x3(1) := x2(1) add (x2(5) mult w(1));
x3(2) := x2(2) add (x2(6) mult w(2));
x3(3) := x2(3) add (x2(7) mult w(3));
return sum;

end process;

end Behavioral;

Any chance you point me with a model please?........

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:15

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Where is s defined?

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.fft_pkg.all;

entity butterfly is
port(
s1,s2 : in comp_array;      --inputs
w :in comp_array;      -- phase factor
x1_out,x2_out :out comp_array      -- outputs
);
end butterfly;

i reckon it should be

port(
s, s1,s2 : in comp_array;      --inputs
w :in comp_array;      -- phase factor
x1_out,x2_out :out comp_array      -- outputs
);

instead?

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:18

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my bad duke,

s and w are defined in my butterfly behavioural coding and i'll put it
on now.....

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:18

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.fft_pkg.ALL;

type complex is
record
r : real;
i : real;
end record;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

entity fft8 is
port(   s : in comp_array; --input signals in time domain
y : out comp_array  --output signals in frequency domain
);
end fft8;

architecture Behavioral of fft8 is

component butterfly is
port(
s1,s2 : in complex;      --inputs
w :in complex;      -- phase factor
g1,g2 :out complex      -- outputs
);
end component;

signal g1,g2 : comp_array := (others => (0.0,0.0));
--phase factor, W_N = e^(-j*2*pi/N)  and N=8 here.
--W_N^i = cos(2*pi*i/N) - j*sin(2*pi*i/N);  and i has range from 0 to 7.
constant w : comp_array2 := ( (1.0,0.0), (0.7071,-0.7071), (0.0,-1.0),
(-0.7071,-0.7071) );

architecture Behavioral of fft8 is

component butterfly is
port(
s1,s2 : in complex;      --inputs
w :in complex;      -- phase factor
x1,x2 :out complex      -- outputs
);
end component;

--phase factor, W_N = e^(-j*2*pi/N)  and N=8 here.
--W_N^i = cos(2*pi*i/N) - j*sin(2*pi*i/N);  and i has range from 0 to 7.
begin

--first stage of butterfly's.
bf11 : butterfly port map(s(0),s(4),w(0),x1(0),x1(1));
bf12 : butterfly port map(s(2),s(6),w(0),x1(2),x1(3));
bf13 : butterfly port map(s(1),s(5),w(0),x1(4),x1(5));
bf14 : butterfly port map(s(3),s(7),w(0),x1(6),x1(7));

--second stage of butterfly's.
bf21 : butterfly port map(x1(0),x1(2),w(0),x2(0),x2(2));
bf22 : butterfly port map(x1(1),x1(3),w(2),x2(1),x2(3));
bf23 : butterfly port map(x1(4),x1(6),w(0),x2(4),x2(6));
bf24 : butterfly port map(x1(5),x1(7),w(2),x2(5),x2(7));

--third stage of butterfly's.
bf31 : butterfly port map(x2(0),x2(4),w(0),x3(0),x3(4));
bf32 : butterfly port map(x2(1),x2(5),w(1),x3(1),x3(5));
bf33 : butterfly port map(x2(2),x2(6),w(2),x3(2),x3(6));
bf34 : butterfly port map(x2(3),x2(7),w(3),x3(3),x3(7));

 Author: Duke Scarring (Guest) Posted on: 2012-04-16 16:26

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It fits not together:
(signals are comp_array)
 entity butterfly is port( s, s1,s2 : in comp_array; --inputs w :in comp_array; -- phase factor x1_out,x2_out :out comp_array -- outputs ); end butterfly; 

(signals are complex)
 component butterfly is port( s1,s2 : in complex; --inputs w :in complex; -- phase factor g1,g2 :out complex -- outputs ); end component; 

(number of signals didn't fit with the first entity of butterfly)
 bf11 : butterfly port map(s(0),s(4),w(0),x1(0),x1(1)); 

Are you sure, that you know what you want to do?

Duke

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:32

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entity butterfly is
port(
s, s1,s2 : in comp_array;      --inputs
w :in comp_array;      -- phase factor
x1_out,x2_out :out comp_array      -- outputs
);
end butterfly;

(signals are complex)
component butterfly is
port(
s1,s2 : in complex;      --inputs
w :in complex;      -- phase factor
g1,g2 :out complex      -- outputs
);
end component;

(number of signals didn't fit with the first entity of butterfly)
bf11 : butterfly port map(s(0),s(4),w(0),x1(0),x1(1));

Alright, removing the s frim the input array in the entity, still, the
problem is  persisting....

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:34

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but to answer your question straight forward, the input signals are s1
and s2 only....

 Author: Duke Scarring (Guest) Posted on: 2012-04-16 16:49

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> but to answer your question straight forward, the input signals are s1
> and s2 only....
Ok. But in your equation you ask for s. And it is defined elsewhere...
[vhdl
entity butterfly is
port(
s1, s2         : in  comp_array;  --inputs
w              : in  comp_array;  -- phase factor
x1_out, x2_out : out comp_array   -- outputs
);
end butterfly;

architecture Behavioral of butterfly is

signal xxx : integer := 0;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

function add (x1, x2, x3  : comp_array) return comp_array;
function sub (x1, x2, x3  : comp_array) return comp_array;
function mult (x1, x2, x3 : comp_array) return comp_array;
begin

--butterfly equations.
process
[/vhdl]
Ok so far.

  function add (x1, x2, x3 : comp_array) return comp_array is function sub (x1, x2, x3 : comp_array) return comp_array is function mult (x1, x2, x3 : comp_array) return comp_array is 
What is this? A function in a function in a function? Or what?

  begin --1st stage equations: function sub (x1, x2, x3 : comp_array) return comp_array is variable diff : comp_array; x1(1) := s(0) sub; (s(4) mult w); x1(3) := s(2) sub; (s(6) mult w); x1(5) := s(1) sub; (s(5) mult w); 
You need to start again with VHDL basics....

Duke

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 16:58

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honestly mate,

am a newbie in vhdl, anything you can help with here ma man, anything
which could sort it out?.......... Please, it looks like you know what
to do....

 Author: nehsr (Guest) Posted on: 2012-04-16 17:12

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
library work;
use work.fft_pkg.all;

entity butterfly is
port(
s1,s2 : in complex;      --inputs
w :in complex;      -- phase factor
x1_out,x2_out :out complex      -- outputs
);
end butterfly;

architecture Behavioral of butterfly is

signal xxx : integer := 0;

type comp_array is array (0 to 7) of complex;
type comp_array2 is array (0 to 3) of complex;

function add (x1,x2,x3 : comp_array) return comp_array;
function sub (x1,x2,x3 : comp_array) return comp_array;
function mult (x1,x2,x3 : comp_array) return comp_array;
begin

--butterfly equations.

function sub (x1,x2,x3 : comp_array) return comp_array is
variable diff : comp_array;

x1(1) := s(0) sub (s(4) mult w);

x1(3) := s(2) sub (s(6) mult w);

x1(5) := s(1) sub (s(5) mult w);

--2nd stage equations:

x2(2) := x1(0) sub (x1(2) mult w(0));

x2(1) := x1(1) sub (x1(3) mult w(2));

x2(4) := x1(4) sub (x1(6) mult w(0));

x2(5) := x1(5) sub (x1(7) mult w(2));

--3rd stage equations:

x3(4) := x2(0) sub (x2(4) mult w(0));

X3(5) := x2(1) sub (x2(5) mult w(1));

x3(6) := x2(2) sub (x2(6) mult w(2));

x3(7) := x2(3) sub (x2(7) mult w(3));
return diff;
end sub;

--1st stage equations:
function add (x1,x2,x3 : comp_array) return comp_array is
variable sum : comp_array;

x1(0) := s(0) add (s(4) mult w);
x1(2) := s(2) add (s(6) mult w);
x1(4) := s(1) add (s(5) mult w);
x1(6) := s(3) add (s(7) mult w);
--2nd stage equations (sum):
x2(0) := x1(0) add (x1(2) mult w(0));
x2(3) := x1(1) add (x1(3) mult w(2));
x2(6) := x1(4) add (x1(6) mult w(0));
x2(7) := x1(5) add (x1(7) mult w(2));
--3rd stage equations(sum):
x3(0) := x2(0) add (x2(4) mult w(0));
x3(1) := x2(1) add (x2(5) mult w(1));
x3(2) := x2(2) add (x2(6) mult w(2));
x3(3) := x2(3) add (x2(7) mult w(3));
return sum;

end process;

end Behavioral;

 Author: nehssen sock (nehsr) Posted on: 2012-04-16 17:13

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any glimpse duke?........

 Author: Duke Scarring (Guest) Posted on: 2012-04-17 10:50

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 library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.MATH_REAL.all; library work; use work.fft_pkg.all; entity butterfly is port( s1, s2 : in complex; --inputs w : in complex; -- phase factor x1_out, x2_out : out complex -- outputs ); end butterfly; architecture Behavioral of butterfly is signal xxx : integer := 0; type comp_array is array (0 to 7) of complex; type comp_array2 is array (0 to 3) of complex; -- function add (x1, x2, x3 : comp_array) return comp_array; -- function sub (x1, x2, x3 : comp_array) return comp_array; -- function mult (x1, x2, x3 : comp_array) return comp_array; --butterfly equations. function sub (s, w : comp_array) return comp_array is variable diff : comp_array; variable x1 : comp_array; variable x2 : comp_array; variable x3 : comp_array; begin x1(1) := sub(s(0), mult(s(4), w(0))); x1(3) := sub(s(2), mult(s(6), w(0))); x1(5) := sub(s(1), mult(s(5), w(0))); --2nd stage equations: x2(2) := sub(x1(0), mult(x1(2), w(0))); x2(1) := sub(x1(1), mult(x1(3), w(2))); x2(4) := sub(x1(4), mult(x1(6), w(0))); x2(5) := sub(x1(5), mult(x1(7), w(2))); --3rd stage equations: x3(4) := sub(x2(0), mult(x2(4), w(0))); X3(5) := sub(x2(1), mult(x2(5), w(1))); x3(6) := sub(x2(2), mult(x2(6), w(2))); x3(7) := sub(x2(3), mult(x2(7), w(3))); return diff; end sub; --1st stage equations: function add (s, w : comp_array) return comp_array is variable sum : comp_array; variable x1 : comp_array; variable x2 : comp_array; variable x3 : comp_array; begin x1(0) := sub(s(0), mult(s(4), w(0))); x1(2) := sub(s(2), mult(s(6), w(0))); x1(4) := sub(s(1), mult(s(5), w(0))); x1(6) := sub(s(3), mult(s(7), w(0))); --2nd stage equations (sum): x2(0) := sub(x1(0), mult(x1(2), w(0))); x2(3) := sub(x1(1), mult(x1(3), w(2))); x2(6) := sub(x1(4), mult(x1(6), w(0))); x2(7) := sub(x1(5), mult(x1(7), w(2))); --3rd stage equations(sum): x3(0) := sub(x2(0), mult(x2(4), w(0))); X3(1) := sub(x2(1), mult(x2(5), w(1))); x3(2) := sub(x2(2), mult(x2(6), w(2))); x3(3) := sub(x2(3), mult(x2(7), w(3))); return sum; end add; begin --end process; end Behavioral; 

Where can I send the bill?

>any glimpse duke?........
Yes: You should swich to business economics.

Duke

 Author: nehsr (Guest) Posted on: 2012-04-17 11:15

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--1st stage equations:
function add (s, w : comp_array) return comp_array is
variable sum : comp_array;
variable x1  : comp_array;
variable x2  : comp_array;
variable x3  : comp_array;

begin
x1(0) := sub(s(0), mult(s(4), w(0)));
x1(2) := sub(s(2), mult(s(6), w(0)));
x1(4) := sub(s(1), mult(s(5), w(0)));
x1(6) := sub(s(3), mult(s(7), w(0)));
--2nd stage equations (sum):
x2(0) := sub(x1(0), mult(x1(2), w(0)));
x2(3) := sub(x1(1), mult(x1(3), w(2)));
x2(6) := sub(x1(4), mult(x1(6), w(0)));
x2(7) := sub(x1(5), mult(x1(7), w(2)));
--3rd stage equations(sum):
x3(0) := sub(x2(0), mult(x2(4), w(0)));
X3(1) := sub(x2(1), mult(x2(5), w(1)));
x3(2) := sub(x2(2), mult(x2(6), w(2)));
x3(3) := sub(x2(3), mult(x2(7), w(3)));
return sum;

begin

should be add instead of sub before each function in this one........
But you solved it genius!!!............ ma man!..... u german i reckon,
so tschusss............. many thanks .........

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