Forum: FPGA, VHDL & Verilog PCI express programming using verilog

Author: Bharathi Jain (Company: VTPL) (bharathi)
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I'm new to PCI-express progamming.

following are my basic questions about PCI express programming.

is there any extra external memory is required to store recieved 
packetized data??

we are using Xilinx provided IP core,is having BRAM selection 
options,will it be sufficient to store data???

is there any data capture validation tool for PCI-express??

how can i verify bandwidth and operating SPEED on board??

can anyone help me to clear above doubts???



Author: Christian Leber (Guest)
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Hello Bharathi,

being fair i have to tell you, that your question clearly demonstrates 
that you have no remote idea what you are doing. You will fail most 
likely or pay a very high price (in time). Don't do it or get 
professional help.

Author: Florian Pfanner (Guest)
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search the Xilinx webside, there are several documents you should read. 
There are also some example designs available.

Example documents:
"Understanding Performance of PCI Express Systems"
"Bus Master DMA Reference Design for the Xilinx Endpoint Block Plus Core 
for PCI Express"

Best regards,


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