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Forum: FPGA, VHDL & Verilog Use of function and packages in testbench


Author: Raghavendra B. (raghavendra_b98)
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Hi,
I written VHDL function as package,how to use that function in testbench 
code.
function to_max(a, b : integer) return integer is
  variable output :integer;
  begin
if (a > b)then
 output := a;
  return output ;
  else
output := b;
  return output;
  end if;
Thanks in advance

Regards
Raghvendra

Author: Duke Scarring (Guest)
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Declare it:
library my_library;
use my_library.my_package.to_max;

Duke

Author: Raghavendra B. (raghavendra_b98)
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Thanks for reply..i done that declaration part..my problem is how to 
give input to a and b .

Author: berndl (Guest)
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<glasshouse on>
... and you expect a usefull info or solution with the input that you 
gave...?
<glasshouse off>

Author: Raghavendra B. (raghavendra_b98)
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Thanks for your reply.I need soluation for inputs along with useful 
information.

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