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Forum: ARM programming with GCC/GNU tools LCP2292: CAN Receive Buffer Status


Author: emp (Guest)
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Hi,
I am working with a LPC2292/01 Rev. C and use the CAN interface 1 of 
this chip.

The RBS and the DOS bit in the CAN1GSR are never set.

I checked the address of the Register definition of CAN1GSR twice.

Transmitting works. Receiving works, when I ignore the RBS-Bit.

I looked at the code from the AN10438 and RBS and DOS were never 
checked. Are these Bits broken? There is nothing in the errata. How can 
you determine when there is a new message without the RBS-bit.

Has anyone an idea?

Here is my Code (initialisation and receive-function)

void can_init()
{
  //Reset bus
  C1MOD = (1 << 0);

  //Bus-Timing 25kBit (60MHz PCLK)
  //Prescaler: 300, SJW: 1, TESG1: 5, TESG2: 2
  C1BTR = 299 | (4 << 16) | (1 << 20);

  //IO
  PINSEL1 |= (0x01 << 18);

  //activate
  C1MOD &= ~(1 << 0);
}

int8_t can_read_msg(CAN_MSG * msg)
{
  //Receive
  if(C1GSR & 0x01)
  {
    msg->len = (C1RFS >> 16) & 0x0F;  //read length
    msg->id = C1RID & 0x3FF;    //read ID

    if(C1RFS & (1 << 30))      //RTR?
    {
      msg->status = CAN_STATUS_RTR;  //RTR Flag
    }
    else
    {
      //no RTR, read databytes, ignore length
      msg->data[0] = C1RDA & 0xFF;
      msg->data[1] = (C1RDA >> 8) & 0xFF;
      msg->data[2] = (C1RDA >> 16) & 0xFF;
      msg->data[3] = (C1RDA >> 24) & 0xFF;
      msg->data[4] = C1RDB & 0xFF;
      msg->data[5] = (C1RDB >> 8) & 0xFF;
      msg->data[6] = (C1RDB >> 16) & 0xFF;
      msg->data[7] = (C1RDB >> 24) & 0xFF;
    }

    //next time, next message
    C1CMR = (1 << 2);

    return 0;
  }
  else
  {
    return -1;
  }
}

Author: emp (Guest)
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I found it myself.

If you don't use CAN-filters, you'll have to by-pass the CAN-filters.

Setting the AccBP bit in the AFMR register does the trick.
AFMR |= ( 1 << 1);

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