Hi! I'm new to VHDL and have been trying to learn it for the past 
2weeks,
i would like to ask for help for my project, which is Development of 
Universal Asynchronous Receiver Transmitter (UART) using VHDL.
I have drawn the board diagram , and the expected wave form for my 
project, but is facing trouble coding it. I have attached my pictures of 
'board diagram and waveform' in the attached files, hope u all can help 
me out.
i have try coding the clock divider,
library ieee;
use ieee.std_logic_1164.all, ieee.std_logic_unsigned.all;

entity divider is
port (clk: in std_logic;
    output_clk, output_clk2: out std_logic);

end;

architecture sim of divider is

    signal count: integer range 0 to 250000;
    signal reg: std_logic;
    signal count2: integer range 0 to 868056;
    signal reg2: std_logic;

begin

output_clk <= reg;
output_clk2 <= reg2;

process(clk)
begin


        if rising_edge(clk) then

        if (count < 249999) then
            count <= count + 1;
        else
            count <= 0;
       end if;

       if (count < 125000) then
           reg <= '0';
        else
           reg <= '1';
       end if;

       if (count2 < 868055) then
           count2 <= count2 + 1;
        else
           count2 <= 0;
    end if;
       if (count2 < 434028) then
            reg2 <= '0';
            else
            reg2 <= '1';
        end if;

     end if;

end process;
end;
and also the ring counter,

Library IEEE;
Use IEEE.std_logic_1164.all;

entity ring is port
(clk, reset : in std_logic;
 G1, G2, G3, G4 : out std_logic);
end;

architecture ring_counter of ring is
        signal reg1, reg2, reg3, reg4: std_logic;

begin
    G1 <= reg1;
    G2 <= reg2;
    G3 <= reg3;
    G4 <= reg4;

 process (clk, reset)
    begin
    if (reset='0') then
        reg1 <= '0';
        reg2 <= '1';
        reg3 <= '1';
        reg4 <= '1';
elsif (clk'event and clk='1') then
            reg4 <= reg1;
            reg3 <= reg4;
            reg2 <= reg3;
            reg1 <= reg2;
    end if;
end process;
end;

please feel free to guide me on the other blocks,
Thanks!