# Forum: FPGA, VHDL & Verilog i need help for my project.

 Author: Dimitris (Guest) Posted on: 2011-01-14 19:59

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I want to fix a code  in vhdl.i have to give the numbers from 0-255 as
input and i want to take in outout the nymbers in hex system in 2 seven
segment display.

 Author: nobody (Guest) Posted on: 2011-01-14 20:01

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And the question is what is the question?!

 Author: Dimitris (Guest) Posted on: 2011-01-14 20:03

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i dont know how to do this..how i will present the naumbers in the 2
dispay??

 Author: Armin (Guest) Posted on: 2011-01-15 12:43

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here you can find display patterns for the digits 0 to f used in HEX
representation
http://en.wikipedia.org/wiki/Seven-segment_display...

 Author: Patrick (Guest) Posted on: 2011-01-15 13:03

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I'm afraid your question is incomplete. So I'm now guessing:

- I believe you have an eight bits wide unsigned input vector.
- I also estimate that your seven segment displays are connected to your
FPGA 1:1 and thus do not need to be multiplexed.

If I'm right with both estimations, the simplest way for you to do it is
the following:

- In your thoughts, split up your eight bits wide vector into two four
bits wide vectors, each of them serving one display.
- For each four-bit-vector, instantiate a truth table converting all
input value patterns possible (0..15) into their correct representations

I suppose you're a VHDL beginner. Here's a good tutorial:
http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html

The truth tables could be implemented with a SELECT or a CASE statement,
for example.

Patrick

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