EmbDev.net

Forum: FPGA, VHDL & Verilog Overheated FPGA? (Spartan-3E)


Author: Johan Sa (josa)
Posted on:
Attached files:

Rate this post
0 useful
not useful
Me and my college are first time users of programming a FPGAs. We have 
bought the already assembled card Xylo-L from knjn. It has a Spartan-3E 
FPGA among other parts. Somewhere during the process of handling this 
card something has gone wrong and now when we connect power to the card 
it gets really hot fast. We can still put in some simple functions into 
the FPGA, e.g. we can make a couple of LED glow and blink. This must 
mean that the FPGA is not totally crashed. We have tested to reset the 
card with the USB cable that's connected to the card.
When be put 3,3V to the card there is a current of about 900mA to the 
card, which is plenty when we expect at most 300mA.

We would be very happy if anyone can give us some idea of what's wrong 
and/or how we can test our card to find the problem, or maybe how to 
reset the card completely.

Author: Na sowas (Guest)
Posted on:

Rate this post
0 useful
not useful
> This must mean that the FPGA is not totally crashed.
My assumption is that you have destroyed the FPGA partially.

> or maybe how to reset the card completely.
After a power turn-off-turn-on cycle the FPGA is reset. Then it starts 
to load the configuration bitstream out of the config PROM (depends on 
the MODE pins). So just erase the config PROM and switch power off and 
on again....

Author: Johan Sa (josa)
Posted on:

Rate this post
0 useful
not useful
>> This must mean that the FPGA is not totally crashed.
> My assumption is that you have destroyed the FPGA partially.
Is there any way to find out what parts are broken?

>> or maybe how to reset the card completely.
> After a power turn-off-turn-on cycle the FPGA is reset. Then it starts
> to load the configuration bitstream out of the config PROM (depends on
> the MODE pins). So just erase the config PROM and switch power off and
> on again....
We have tested this with no change to the FPGA. We are suspecting that 
there are suppose to be a "deeper" reset somewhere. Maybe we need to use 
JTAG to reach it.

Author: Na sowas (Guest)
Posted on:

Rate this post
0 useful
not useful
> Maybe we need to use JTAG to reach it.
A S3 FPGA is just a piece of silicon after power up. It is completly 
like new. There is absolutely no kind of memory in it, so there is 
nothing to reset...

> there are suppose to be a "deeper" reset somewhere.
No, its much simpler: your FPGA is (at least half) dead  :-(

Reply

Entering an e-mail address is optional. If you want to receive reply notifications by e-mail, please log in.

Rules — please read before posting

  • Post long source code as attachment, not in the text
  • Posting advertisements is forbidden.

Formatting options

  • [c]C code[/c]
  • [avrasm]AVR assembler code[/avrasm]
  • [vhdl]VHDL code[/vhdl]
  • [code]code in other languages, ASCII drawings[/code]
  • [math]formula (LaTeX syntax)[/math]




Bild automatisch verkleinern, falls nötig
Note: the original post is older than 6 months. Please don't ask any new questions in this thread, but start a new one.