Hello,

During configuration of Ethernet, JTAG is losing communication with the
target.

In LPC17xx manual there is a remark as follow

Remark: when initializing the Ethernet block, it is important to first
configure the PHY and insure that reference clocks (ENET_REF_CLK signal
in RMII mode, or both ENET_RX_CLK and ENET_TX_CLK signals in MII mode)
are present at the external pins and connected to the EMAC module
(selecting the appropriate pins using the PINSEL registers) prior to
continuing with Ethernet configuration. Otherwise the CPU can become
locked and no further functionality will be possible. This will cause
JTAG lose communication with the target, if debug mode is being used.

Hopefully I have initialized correctly. Initialization have following
code,

  /* Power Up the EMAC controller. */
   SC->PCONP |= 0x40000000;

   /* Enable P1 Ethernet Pins. */
   PINCON->PINSEL2 = 0x50150105;
   PINCON->PINSEL3 = (PINCON->PINSEL3 & ~0x0000000F) | 0x00000005;

  /* Reset all EMAC internal modules. */
  EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_ TX | MAC1_RES_RX |
MAC1_RES_MCS_ RX |
             MAC1_SIM_RES | MAC1_SOFT_RES;
  EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;

Is there any problem in this configuration?

KS8721 PHY is the device which I am using in my board.

-Prakash
9886545216