Forum: ARM programming with GCC/GNU tools NXP LPC11xx linker issue

Author: Trinh Quang thieu (tqthieu)
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HI everybody,

I'm working on LPC11xx cortext M0. I'm using GCC 4.4.1
When linking I got problem as below:

* Cortex M0 sing "armv6-m" library: the assembly code of veneer (created 
when linking) as below:

This code calls a function from ROM to RAM.

00000124 <c_entry>:
 124: b580        push  {r7, lr}
 126: af00        add   r7, sp, #0
 128: f001 f8c4   bl    12b4 <SystemInit>
 12c: e02c        b.n   188 <c_entry+0x64>
 12e: 2002        movs  r0, #2
 130: f000 f844   bl    1bc <load_overlay>
 134: f000 ea44   blx   5c0 <__i2c_sbl_init_veneer>   <------ This 
instruction is not supported in cortex M0

This instruction caused the undifined instruction when running sofware.

Could anybody help me to find out what problem is?

Thank you


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