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Forum: ARM programming with GCC/GNU tools Wait states for reading and writing flash


Author: Vinit Bidkar (vinitbidkar)
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CPU - AT91SAM7X256

Which factor decides the number of wait states required for reading and
writing the flash.

i am running the cpu at 32 MHz, so how many wait states are needed for
reading and writing flash?

Vinit

Author: Clifford Slocombe (clifford)
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Vinit Bidkar wrote:
>
> CPU - AT91SAM7X256
>
> Which factor decides the number of wait states required for reading and
> writing the flash.
>
> i am running the cpu at 32 MHz, so how many wait states are needed for
> reading and writing flash?

At the risk of sounding like I am saying RTFM (which I am), the answer
is on page 612 of
http://www.keil.com/dd/docs/datashts/atmel/at91sam...

Since you only get single cycle access at or below 30MHz, you may find
that you get better performance by reducing the clock slightly so you
can use zero wait state.

A newer revision of the manual is available at
http://www.atmel.com/dyn/resources/prod_documents/... but it is
a far slower download. In this revision it is on page 627.

Clifford

Author: Vinit Bidkar (vinitbidkar)
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Clifford Slocombe wrote:
> Vinit Bidkar wrote:
>>
>> CPU - AT91SAM7X256
>>
>
> At the risk of sounding like I am saying RTFM (which I am), the answer
> is on page 612 of
> http://www.keil.com/dd/docs/datashts/atmel/at91sam...
> A newer revision of the manual is available at
> http://www.atmel.com/dyn/resources/prod_documents/... but it is
> a far slower download. In this revision it is on page 627.
>
> Clifford

Thanks a lot Clifford.

I will consider your inputs. Also i think i should have searched the
datasheet bit more thoroughly :-)

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