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Forum: ARM programming with GCC/GNU tools problem getting WinARM to work with the Sam7A3


Author: Pete Gasper (pgasper)
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I'm trying to load the (keil/gcc) basic project that came with the
ATSAM7A3-EK eval board. I have it compiling fine, using
at91sam7s64_Atmel_example as an example, but I am unable to load it on
the board and get it to run. I can load to flash memory just fine an IAR
compile of this code, so I wonder if it is a problem with what is being
built, not my flash procedure. I've tried this with different
optimization and debug options, no luck. I have also been unable to
successfully run a RAM build with Insight.

I'm using:
WinARM Version 20060606
OpenOCD - Version SVN88
ATSAM7A3-EK eval board

Let me know what information would be helpful. Below are my makefile, ld
file, and OCD config file.

Should commenting out "DEBUG = stabs" produce a build with no debug
information?

makefile:


# Hey Emacs, this is a -*- makefile -*-
#
# WinARM template makefile
# by Martin Thomas, Kaiserslautern, Germany
# <eversmith@heizung-thomas.de>
#
# based on the WinAVR makefile written by Eric B. Weddington, Jörg
Wunsch, et al.
# Released to the Public Domain
# Please read the make user manual!
#
#
# On command line:
#
# make all = Make software.
#
# make clean = Clean out built project files.
#
# make program = Download the hex file to the device, using lpc21isp
#
# (TODO: make filename.s = Just compile filename.c into the assembler
code only)
#
# To rebuild project do "make clean" then "make all".
#
# Changelog:
# - 17. Feb. 2005  - added thumb-interwork support (mth)
# - 28. Apr. 2005  - added C++ support (mth)
# - 29. Arp. 2005  - changed handling for lst-Filename (mth)
#

# MCU name and submodel
MCU = arm7tdmi
#SUBMDL = AT91SAM7S64
SUBMDL = AT91SAM7A3
#THUMB    = -mthumb
#THUMB_IW = -mthumb-interwork


## Create ROM-Image (final)
RUN_MODE=ROM_RUN
## Create RAM-Image (debugging)
#RUN_MODE=RAM_RUN



# Output format. (can be srec, ihex, binary)
FORMAT = binary
#FORMAT = srec


# Target file name (without extension).
TARGET = main


# List C source files here. (C dependencies are automatically
generated.)
# use file-extension c for "c-only"-files
SRC =
#SRC =

# List C source files here which must be compiled in ARM-Mode.
# use file-extension c for "c-only"-files
SRCARM = $(TARGET).c Cstartup_SAM7.c

# List C++ source files here.
# use file-extension cpp for C++-files (use extension .cpp)
#CPPSRC =

# List C++ source files here which must be compiled in ARM-Mode.
# use file-extension cpp for C++-files (use extension .cpp)
#CPPSRCARM = $(TARGET).cpp
#CPPSRCARM =

# List Assembler source files here.
# Make them always end in a capital .S.  Files ending in a lowercase .s
# will not be considered source files but generated files (assembler
# output from the compiler), and will be deleted upon "make clean"!
# Even though the DOS/Win* filesystem matches both .s and .S the same,
# it will preserve the spelling of the filenames, and gcc itself does
# care about how the name is spelled on its command-line.
#ASRC =

# List Assembler source files here which must be assembled in ARM-Mode..
ASRCARM = Cstartup.S

# Optimization level, can be [0, 1, 2, 3, s].
# 0 = turn off optimization. s = optimize for size.
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
OPT = s
#OPT = 0

# Debugging format.
# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
#DEBUG = stabs
#DEBUG = dwarf-2

# List any extra directories to look for include files here.
#     Each directory must be seperated by a space.
#EXTRAINCDIRS = ./include
#EXTRAINCDIRS = ../inc

# Compiler flag to set the C Standard level.
# c89   - "ANSI" C
# gnu89 - c89 plus GCC extensions
# c99   - ISO C99 standard (not yet fully implemented)
# gnu99 - c99 plus GCC extensions
CSTANDARD = -std=gnu99

# Place -D or -U options for C here
CDEFS =  -D$(RUN_MODE)

# Place -I options here
CINCS =

# Place -D or -U options for ASM here
ADEFS =  -D$(RUN_MODE)


# Compiler flags.
#  -g*:          generate debugging information
#  -O*:          optimization level
#  -f...:        tuning, see GCC manual and avr-libc documentation
#  -Wall...:     warning level
#  -Wa,...:      tell GCC to pass this to the assembler.
#    -adhlns...: create assembler listing
#
# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
CFLAGS = -g$(DEBUG)
CFLAGS += $(CDEFS) $(CINCS)
CFLAGS += -O$(OPT)
CFLAGS += -Wall -Wcast-align -Wimplicit
CFLAGS += -Wpointer-arith -Wswitch
CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<)
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
#AT91-lib warnings with:
##CFLAGS += -Wcast-qual


# flags only for C
CONLYFLAGS += -Wnested-externs
CONLYFLAGS += $(CSTANDARD)
#AT91-lib warnings with:
##CONLYFLAGS += -Wmissing-prototypes
##CONLYFLAGS  = -Wstrict-prototypes
##CONLYFLAGS += -Wmissing-declarations



# flags only for C++ (arm-elf-g++)
# CPPFLAGS = -fno-rtti -fno-exceptions
CPPFLAGS =

# Assembler flags.
#  -Wa,...:   tell GCC to pass this to the assembler.
#  -ahlms:    create listing
#  -gstabs:   have the assembler create line number information; note
that
#             for use in COFF files, additional information about
filenames
#             and function names needs to be present in the assembler
source
#             files -- see avr-libc docs [FIXME: not yet described
there]
##ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG)

#Additional libraries.

#Support for newlibc-lpc (file: libnewlibc-lpc.a)
#NEWLIBLPC = -lnewlib-lpc

MATH_LIB = -lm

# CPLUSPLUS_LIB = -lstdc++

# Linker flags.
#  -Wl,...:     tell GCC to pass this to linker.
#    -Map:      create map file
#    --cref:    add cross reference to  map file
LDFLAGS = -nostartfiles -Wl,-Map=$(TARGET).map,--cref
LDFLAGS += -lc
LDFLAGS += $(NEWLIBLPC) $(MATH_LIB)
LDFLAGS += -lc -lgcc
LDFLAGS += $(CPLUSPLUS_LIB)

# Set Linker-Script Depending On Selected Memory
ifeq ($(RUN_MODE),RAM_RUN)
LDFLAGS +=-T$(SUBMDL)-RAM.ld
else
LDFLAGS +=-T$(SUBMDL)-ROM.ld
endif



#
------------------------------------------------------------------------ 
---
# Flash-Programming support using lpc21isp by Martin Maurer

# Settings and variables:
#LPC21ISP = lpc21isp
LPC21ISP = lpc21isp_beta
LPC21ISP_PORT = com1
LPC21ISP_BAUD = 115200
LPC21ISP_XTAL = 14746
LPC21ISP_FLASHFILE = $(TARGET).hex
# verbose output:
## LPC21ISP_DEBUG = -debug
# enter bootloader via RS232 DTR/RTS (only if hardware supports this
# feature - see Philips AppNote):
LPC21ISP_CONTROL = -control


#
------------------------------------------------------------------------ 
---

# Define directories, if needed.
## DIRARM = c:/WinARM/
## DIRARMBIN = $(DIRAVR)/bin/
## DIRAVRUTILS = $(DIRAVR)/utils/bin/

# Define programs and commands.
SHELL = sh
CC = arm-elf-gcc
CPP = arm-elf-g++
OBJCOPY = arm-elf-objcopy
OBJDUMP = arm-elf-objdump
SIZE = arm-elf-size
NM = arm-elf-nm
REMOVE = rm -f
COPY = cp


# Define Messages
# English
MSG_ERRORS_NONE = Errors: none
MSG_BEGIN = -------- begin --------
MSG_END = --------  end  --------
MSG_SIZE_BEFORE = Size before:
MSG_SIZE_AFTER = Size after:
MSG_FLASH = Creating load file for Flash:
MSG_EXTENDED_LISTING = Creating Extended Listing:
MSG_SYMBOL_TABLE = Creating Symbol Table:
MSG_LINKING = Linking:
MSG_COMPILING = Compiling C:
MSG_COMPILING_ARM = "Compiling C (ARM-only):"
MSG_COMPILINGCPP = Compiling C++:
MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):"
MSG_ASSEMBLING = Assembling:
MSG_ASSEMBLING_ARM = "Assembling (ARM-only):"
MSG_CLEANING = Cleaning project:
MSG_LPC21_RESETREMINDER = You may have to bring the target in
bootloader-mode now.


# Define all object files.
COBJ      = $(SRC:.c=.o)
AOBJ      = $(ASRC:.S=.o)
COBJARM   = $(SRCARM:.c=.o)
AOBJARM   = $(ASRCARM:.S=.o)
CPPOBJ    = $(CPPSRC:.cpp=.o)
CPPOBJARM = $(CPPSRCARM:.cpp=.o)

# Define all listing files.
LST = $(ASRC:.S=.lst) $(ASRCARM:.S=.lst) $(SRC:.c=.lst)
$(SRCARM:.c=.lst)
LST += $(CPPSRC:.cpp=.lst) $(CPPSRCARM:.cpp=.lst)

# Compiler flags to generate dependency files.
### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d

# Combine all necessary flags and optional flags.
# Add target processor to flags.
ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS)
ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp
$(ASFLAGS)


# Default target.
all: begin gccversion sizebefore build sizeafter finished end

build: elf hex lss sym

elf: $(TARGET).elf
hex: $(TARGET).hex
lss: $(TARGET).lss
sym: $(TARGET).sym

# Eye candy.
begin:
  @echo
  @echo $(MSG_BEGIN)

finished:
  @echo $(MSG_ERRORS_NONE)

end:
  @echo $(MSG_END)
  @echo


# Display size of file.
HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
ELFSIZE = $(SIZE) -A $(TARGET).elf
sizebefore:
  @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_BEFORE);
$(ELFSIZE); echo; fi

sizeafter:
  @if [ -f $(TARGET).elf ]; then echo; echo $(MSG_SIZE_AFTER);
$(ELFSIZE); echo; fi


# Display compiler version information.
gccversion :
  @$(CC) --version


# Program the device.
#see:
http://gandalf.arubi.uni-kl.de/avr_projects/arm_pr...
program: $(TARGET).hex
  @echo
  @echo "Programming with OPENOCD"
  C:\Program Files\openocd-2006re80\bin\openocd-pp.exe -f
arm7_wig_sam7a3_make_program.cfg -d -l openocd_log.txt
  #$(LPC21ISP) $(LPC21ISP_CONTROL) $(LPC21ISP_DEBUG)
$(LPC21ISP_FLASHFILE) $(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL)
  #@echo $(MSG_SAM7A3_RESETREMINDER)


# Create final output files (.hex, .eep) from ELF output file.
# TODO: handling the .eeprom-section should be redundant
%.hex: %.elf
  @echo
  @echo $(MSG_FLASH) $@
  $(OBJCOPY) -O $(FORMAT) $< $@


# Create extended listing file from ELF output file.
# testing: option -C
%.lss: %.elf
  @echo
  @echo $(MSG_EXTENDED_LISTING) $@
  $(OBJDUMP) -h -S -C $< > $@


# Create a symbol table from ELF output file.
%.sym: %.elf
  @echo
  @echo $(MSG_SYMBOL_TABLE) $@
  $(NM) -n $< > $@


# Link: create ELF output file from object files.
.SECONDARY : $(TARGET).elf
.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM)
%.elf:  $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM)
  @echo
  @echo $(MSG_LINKING) $@
  $(CC) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ)
$(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)
#  $(CPP) $(THUMB) $(ALL_CFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ)
$(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)

# Compile: create object files from C source files. ARM/Thumb
$(COBJ) : %.o : %.c
  @echo
  @echo $(MSG_COMPILING) $<
  $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@

# Compile: create object files from C source files. ARM-only
$(COBJARM) : %.o : %.c
  @echo
  @echo $(MSG_COMPILING_ARM) $<
  $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $@

# Compile: create object files from C++ source files. ARM/Thumb
$(CPPOBJ) : %.o : %.cpp
  @echo
  @echo $(MSG_COMPILINGCPP) $<
  $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@

# Compile: create object files from C++ source files. ARM-only
$(CPPOBJARM) : %.o : %.cpp
  @echo
  @echo $(MSG_COMPILINGCPP_ARM) $<
  $(CPP) -c $(ALL_CFLAGS) $(CPPFLAGS) $< -o $@


# Compile: create assembler files from C source files. ARM/Thumb
## does not work - TODO - hints welcome
##$(COBJ) : %.s : %.c
##  $(CC) $(THUMB) -S $(ALL_CFLAGS) $< -o $@


# Assemble: create object files from assembler source files. ARM/Thumb
$(AOBJ) : %.o : %.S
  @echo
  @echo $(MSG_ASSEMBLING) $<
  $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $@


# Assemble: create object files from assembler source files. ARM-only
$(AOBJARM) : %.o : %.S
  @echo
  @echo $(MSG_ASSEMBLING_ARM) $<
  $(CC) -c $(ALL_ASFLAGS) $< -o $@


# Target: clean project.
clean: begin clean_list finished end


clean_list :
  @echo
  @echo $(MSG_CLEANING)
  $(REMOVE) $(TARGET).hex
  $(REMOVE) $(TARGET).obj
  $(REMOVE) $(TARGET).elf
  $(REMOVE) $(TARGET).map
  $(REMOVE) $(TARGET).obj
  $(REMOVE) $(TARGET).a90
  $(REMOVE) $(TARGET).sym
  $(REMOVE) $(TARGET).lnk
  $(REMOVE) $(TARGET).lss
  $(REMOVE) $(COBJ)
  $(REMOVE) $(CPPOBJ)
  $(REMOVE) $(AOBJ)
  $(REMOVE) $(COBJARM)
  $(REMOVE) $(CPPOBJARM)
  $(REMOVE) $(AOBJARM)
  $(REMOVE) $(LST)
  $(REMOVE) $(SRC:.c=.s)
  $(REMOVE) $(SRC:.c=.d)
  $(REMOVE) $(SRCARM:.c=.s)
  $(REMOVE) $(SRCARM:.c=.d)
  $(REMOVE) $(CPPSRC:.cpp=.s)
  $(REMOVE) $(CPPSRC:.cpp=.d)
  $(REMOVE) $(CPPSRCARM:.cpp=.s)
  $(REMOVE) $(CPPSRCARM:.cpp=.d)
  $(REMOVE) .dep/*


# Include the dependency files.
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)


# Listing of phony targets.
.PHONY : all begin finish end sizebefore sizeafter gccversion \
build elf hex lss sym clean clean_list program


ld file:


/*---------------------------------------------------------------------- 
-----*/
/*-         ATMEL Microcontroller Software Support  -  ROUSSET  -
*/
/*---------------------------------------------------------------------- 
-----*/
/* The software is delivered "AS IS" without warranty or condition of
any    */
/* kind, either express, implied or statutory. This includes without
*/
/* limitation any warranty or condition with respect to merchantability
or   */
/* fitness for any particular purpose, or against the infringements of
*/
/* intellectual property rights of others.             */
/*---------------------------------------------------------------------- 
-----*/
/*- File source          : GCC_FLASH.ld
*/
/*- Object               : Linker Script File for Flash Workspace
*/
/*- Compilation flag     : None
*/
/*-
*/
/*- 1.0 11/Mar/05 JPP    : Creation SAM7A3
*/
/*---------------------------------------------------------------------- 
-----*/

/*
//*** <<< Use Configuration Wizard in Context Menu >>> ***
*/


/*
// <h> Memory Configuration
//   <h> Code (Read Only)
//     <o>  Start <0x0-0xFFFFFFFF>
//     <o1> Size  <0x0-0xFFFFFFFF>
//   </h>
//   <h> Data (Read/Write)
//     <o2> Start <0x0-0xFFFFFFFF>
//     <o3> Size  <0x0-0xFFFFFFFF>
//   </h>
//   <h> Top of Stack (Read/Write)
//     <o4> STACK <0x0-0xFFFFFFFF>
//   </h>
// </h>
*/

/* Memory Definitions */

MEMORY
{
  CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
  DATA (rw) : ORIGIN = 0x00200000, LENGTH = 0x00008000
  STACK (rw) : ORIGIN = 0x00208000,LENGTH = 0x00000000
}


/* Section Definitions */

SECTIONS
{
  /* first section is .text which is used for code */
  . = 0x0000000;
  .text : { *cstartup.o (.text) }>CODE =0
  .text :
  {
    *(.text)                   /* remaining code */

    *(.glue_7t) *(.glue_7)

  } >CODE =0

  . = ALIGN(4);

  /* .rodata section which is used for read-only data (constants) */

  .rodata :
  {
    *(.rodata)
  } >CODE

  . = ALIGN(4);

  _etext = . ;
  PROVIDE (etext = .);

  /* .data section which is used for initialized data */

  .data : AT (_etext)
  {
    _data = . ;
    *(.data)
    SORT(CONSTRUCTORS)
  } >DATA
  . = ALIGN(4);

  _edata = . ;
   PROVIDE (edata = .);

  /* .bss section which is used for uninitialized data */

  .bss :
  {
    __bss_start = . ;
    _bss_start_ = . ;
    *(.bss)
    *(COMMON)
  }
  . = ALIGN(4);
  _bss_end_ = . ;
  _bss_end_ = . ;
  _end = .;
    . = ALIGN(4);
   .int_data :
   {
   *(.internal_ram_top)
   }> STACK

  PROVIDE (end = .);

  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the
beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }

}



OpenOCD config file:

#daemon configuration
telnet_port 4444
gdb_port 3333

#interface
interface parport
parport_port 0x378
parport_cable wiggler
jtag_speed 0
#use combined on interfaces or targets that can't set TRST/SRST
separately
reset_config trst_and_srst srst_pulls_trst

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe

#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <endianness> <reset mode> <chainpos> <variant>
#target arm7tdmi little run_and_halt 0 arm7tdmi
target arm7tdmi little run_and_halt 0
#target_script 0 reset h2294_init.script
run_and_halt_time 0 30
#working_area 0 0x40000000 0x40000 nobackup
#probably not right: The AT91SAM7A3 features one bank of 256 Kbytes of
Flash. The Flash is mapped to address
#0x0010 0000. It is also accessible at address 0x0 after the reset and
before the Remap Command.
#after remap: internal flash addressed: 0x00100000 - 0x001FFFFF

#flash configuration
#flash bank <driver> <base> <size> <chip_width> <bus_width>
[driver_options ...]
# mthomas AT91SAM7
flash bank at91sam7 0 0 0 0 0

Author: Jim Kaz (ancaritha)
Posted on:

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This might be because I'm using the SAM-PROG thing to program my SAM7A3
board, but I think you need to program in a .bin file.  Here are the
pieces of my make file that differ from yours in a meaningful way
(atleast ones that I noticed at a first glance, there could be others).


# Output format. (can be srec, ihex, binary)
FORMAT = ihex


build: elf hex lss sym bin

elf: $(OBJDIR)/$(OUTTARGET).elf
hex: $(OBJDIR)/$(OUTTARGET).hex
eep: $(OBJDIR)/$(OUTTARGET).eep
lss: $(OBJDIR)/$(OUTTARGET).lss
sym: $(OBJDIR)/$(OUTTARGET).sym
bin: $(OBJDIR)/$(OUTTARGET).bin


# Create final output files (.hex, .eep) from ELF output file.
# TODO: handling the .eeprom-section should be redundant
%.hex: %.elf
  @echo
  @echo $(MSG_FLASH) $@
  $(OBJCOPY) -O $(FORMAT) $< $@

%.bin: %.elf
  @echo
  @echo $(MSG_BIN) $@
  $(OBJCOPY) -O binary $< $@


Then you're going to want to load the .bin file into the board.  I've
never even looked at OpenOCD, so I can't comment on the accuracy of the
config file you're using.

Let me know if this helps.  I can post my whole make file if you want to
compare the whole thing.

Author: Pete Gasper (pgasper)
Posted on:

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I was using "FORMAT = binary" so that didn't make any difference (but
tried it anyway to no effect). I tried SAM-PROG, and I was able to
successfully load and run the IAR build, but not the GCC build. So I'm
pretty sure I've got a WinARM problem or a problem in my project code or
Makefile.

Author: Jim Kaz (ancaritha)
Posted on:

Rate this post
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Pete Gasper wrote:
> I was using "FORMAT = binary" so that didn't make any difference (but
> tried it anyway to no effect). I tried SAM-PROG, and I was able to
> successfully load and run the IAR build, but not the GCC build. So I'm
> pretty sure I've got a WinARM problem or a problem in my project code or
> Makefile.

So thats what the format thing does :)  I just saw it as hex in all the
other files, and I knew I needed a .bin file, so I added the above part
to make it a .bin.   Heres my whole makefile, maybe you'll find
something else of use in there.

# Hey Emacs, this is a -*- makefile -*-

# MCU name and submodel
MCU = arm7tdmi
SUBMDL = AT91SAM7A3
THUMB    = -mthumb
THUMB_IW = -mthumb-interwork

## Create ROM-Image (final)
RUN_MODE=ROM_RUN
## Create RAM-Image (debugging)
#RUN_MODE=RAM_RUN


## TODO for this example - just a placeholder
## interrupt vectors in ROM
#VECTOR_LOCATION=VECTORS_ROM
## interrupt vectors in RAM
VECTOR_LOCATION=VECTORS_RAM

# Target file name (without extension).
TARGET = BAO_PowerMgr

# Version info
VERSION_MAJOR = 0
VERSION_MINOR = 1

ROOT = ../../../../Root

# List C source files here. (C dependencies are automatically
generated.)
# use file-extension c for "c-only"-files
# syscalls required for WinARM to function
SRC = WinARMsyscalls.c

# List C source files here which must be compiled in ARM-Mode.
# use file-extension c for "c-only"-files
# Required to initialize hardware in ARM-Mode
SRCARM = SAM7Ainit.c

# List C++ source files here.
# use file-extension cpp for C++-files (use extension .cpp)
CPPSRC += AppMain.cpp AppMessages.cpp AppEnums.cpp Messages.cpp
SysEnums.cpp

# List C++ source files here which must be compiled in ARM-Mode.
# use file-extension cpp for C++-files (use extension .cpp)
CPPSRCARM =

# List Assembler source files here.
ASRC =

# List Assembler source files here which must be assembled in ARM-Mode..
ASRCARM = SAM7A3Assembly.S


# Optimization level, can be [0, 1, 2, 3, s].
# 0 = turn off optimization. s = optimize for size.
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
OPT = 1



ifndef MCU
    $(error "!!!! MCU (CPU Type) must be defined")
endif

ifndef SUBMDL
  $(error "!!!! Sub Model type must be defined")
endif


ifndef TARGET
    $(error "!!!! TARGET must be defined")
endif

CDEFS += -D$(TARGET)

ifdef AVR_DEBUG
  CDEFS += -DAVR_DEBUG
endif


# Output format. (can be srec, ihex, binary)
FORMAT = ihex


OUTTARGET = $(TARGET)

ifdef VERSION_MAJOR
ifdef VERSION_MINOR

ifndef VERSION_BUILD
  VERSION_BUILD = 0
endif

OUTTARGET = $(TARGET)-$(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_BUILD)

CDEFS += -DVERSION_MAJOR=$(VERSION_MAJOR)
CDEFS += -DVERSION_MINOR=$(VERSION_MINOR)
CDEFS += -DVERSION_RELEASE=$(VERSION_BUILD)

endif
endif

# with / at end
PATH_TO_LINKSCRIPTS= $(ROOT)/Builds/BuildComps/ArmResources/


ifdef _DEBUG
    # Turn off optimizations
    OPT = 0

    # Debugging format.
    # Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
    # AVR (extended) COFF requires stabs, plus an avr-objcopy run.
    #DEBUG = stabs
    DEBUG = dwarf-2

    # Output directory
    ifndef OBJDIR
        OBJDIR = .debug
    endif
else
    # Let the application decide on optimization level

    # Output directory
    ifndef OBJDIR
        OBJDIR = .out
    endif

endif

ifndef DEPDIR
  DEPDIR = .dep
endif

# Debugging format.
# Native formats for AVR-GCC's -g are stabs [default], or dwarf-2.
# AVR (extended) COFF requires stabs, plus an avr-objcopy run.
#DEBUG = stabs
DEBUG = dwarf-2


# Compiler flag to set the C Standard level.
# c89   - "ANSI" C
# gnu89 - c89 plus GCC extensions
# c99   - ISO C99 standard (not yet fully implemented)
# gnu99 - c99 plus GCC extensions
CSTANDARD = -std=gnu99

# Place -D or -U options for C here
CDEFS +=  -D$(RUN_MODE) -D$(VECTOR_LOCATION) -D__WinARM__

# Place -I options here
CINCS =

# Place -D or -U options for ASM here
ADEFS =  -D$(RUN_MODE) -D$(VECTOR_LOCATION) -D__WinARM__


# Compiler flags.
#  -g*:          generate debugging information
#  -O*:          optimization level
#  -f...:        tuning, see GCC manual and avr-libc documentation
#  -Wall...:     warning level
#  -Wa,...:      tell GCC to pass this to the assembler.
#    -adhlns...: create assembler listing
#
# Flags for C and C++ (arm-elf-gcc/arm-elf-g++)
CFLAGS = -g$(DEBUG)
CFLAGS += $(CDEFS) $(CINCS)
CFLAGS += -O$(OPT)
CFLAGS += -Wall -Wcast-align -Wimplicit
CFLAGS += -Wpointer-arith -Wswitch
CFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
########CFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<)
CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
#AT91-lib warnings with:
##CFLAGS += -Wcast-qual


# flags only for C
CONLYFLAGS += -Wnested-externs
CONLYFLAGS += $(CSTANDARD)
#AT91-lib warnings with:
##CONLYFLAGS += -Wmissing-prototypes
##CONLYFLAGS  = -Wstrict-prototypes
##CONLYFLAGS += -Wmissing-declarations


# flags only for C++ (arm-elf-g++)
# CPPFLAGS = -fno-rtti -fno-exceptions
CPPFLAGS = -g$(DEBUG)
CPPFLAGS += $(CDEFS) $(CINCS)
CPPFLAGS += -O$(OPT)
CPPFLAGS += -Wall -Wno-cast-align -Wimplicit -Wno-non-virtual-dtor
CPPFLAGS += -Wpointer-arith -Wswitch
CPPFLAGS += -Wredundant-decls -Wreturn-type -Wshadow -Wunused
########CPPFLAGS += -Wa,-adhlns=$(subst $(suffix $<),.lst,$<)
CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS))
#AT91-lib warnings with:
##CPPFLAGS += -Wcast-qual



# Assembler flags.
#  -Wa,...:   tell GCC to pass this to the assembler.
#  -ahlms:    create listing
#  -gstabs:   have the assembler create line number information; note
that
#             for use in COFF files, additional information about
filenames
#             and function names needs to be present in the assembler
source
#             files -- see avr-libc docs [FIXME: not yet described
there]
##ASFLAGS = -Wa,-adhlns=$(<:.S=.lst),-gstabs
#########ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:.S=.lst),-g$(DEBUG)

#Additional libraries.

# Minimalistic printf version
PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min

# Floating point printf version (requires MATH_LIB = -lm below)
PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt

PRINTF_LIB = $(PRINTF_LIB_MIN)

# Minimalistic scanf version
SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min

# Floating point + %[ scanf version (requires MATH_LIB = -lm below)
SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt

MATH_LIB = -lm

#Support for newlibc-lpc (file: libnewlibc-lpc.a)
#NEWLIBLPC = -lnewlib-lpc

CPLUSPLUS_LIB = -lstdc++

# Linker flags.
#  -Wl,...:     tell GCC to pass this to linker.
#    -Map:      create map file
#    --cref:    add cross reference to  map file
LDFLAGS = -nostartfiles -Wl,-Map=$(OBJDIR)/$(OUTTARGET).map,--cref
LDFLAGS += -lc
LDFLAGS += $(NEWLIBLPC) $(MATH_LIB)
LDFLAGS += -lc -lgcc
LDFLAGS += $(CPLUSPLUS_LIB)

ifdef USE_SMALL_PRINTF
LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB)
endif


# Set Linker-Script Depending On Selected Memory
ifeq ($(RUN_MODE),RAM_RUN)
LDFLAGS +=-T$(PATH_TO_LINKSCRIPTS)$(SUBMDL)-RAM.ld
else
LDFLAGS +=-T$(PATH_TO_LINKSCRIPTS)$(SUBMDL)-ROM.ld
endif



#
------------------------------------------------------------------------ 
---
### Flash-Programming support using lpc21isp by Martin Maurer

### Settings and variables:
#LPC21ISP = lpc21isp
#LPC21ISP = lpc21isp_beta
#LPC21ISP_PORT = com1
#LPC21ISP_BAUD = 115200
#LPC21ISP_XTAL = 14746
#LPC21ISP_FLASHFILE = $(OBJDIR)/$(OUTTARGET).hex
### verbose output:
#### LPC21ISP_DEBUG = -debug
### enter bootloader via RS232 DTR/RTS (only if hardware supports this
### feature - see Philips AppNote):
#LPC21ISP_CONTROL = -control


#
------------------------------------------------------------------------ 
---

# Define directories, if needed.
## DIRARM = c:/WinARM/
## DIRARMBIN = $(DIRAVR)/bin/
## DIRAVRUTILS = $(DIRAVR)/utils/bin/
DIRVERRENAME = $(ROOT)/../Tools/AddVersionToFile

# Define programs and commands.
SHELL = sh
CC = arm-elf-gcc
CPP = arm-elf-g++
OBJCOPY = arm-elf-objcopy
OBJDUMP = arm-elf-objdump
SIZE = arm-elf-size
NM = arm-elf-nm
REMOVE = rm -f
COPY = cp
MAKEDIR = mkdir
VERSION_RENAME = $(DIRVERRENAME)/AddVersionToFile


# Define Messages
# English
MSG_ERRORS_NONE = Errors: none
MSG_BEGIN = -------- begin --------
MSG_END = --------  end  --------
MSG_SIZE_BEFORE = Size before:
MSG_SIZE_AFTER = Size after:
MSG_FLASH = Creating load file for Flash:
MSG_BIN = Creating load file for Bin:
MSG_EXTENDED_LISTING = Creating Extended Listing:
MSG_SYMBOL_TABLE = Creating Symbol Table:
MSG_LINKING = Linking:
MSG_COMPILING = Compiling C:
MSG_COMPILING_ARM = "Compiling C (ARM-only):"
MSG_COMPILINGCPP = Compiling C++:
MSG_COMPILINGCPP_ARM = "Compiling C++ (ARM-only):"
MSG_ASSEMBLING = Assembling:
MSG_ASSEMBLING_ARM = "Assembling (ARM-only):"
MSG_CLEANING = Cleaning project:
MSG_LPC21_RESETREMINDER = You may have to bring the target in
bootloader-mode now.


# Define all object files.
COBJ      = $(SRC:%.c=$(OBJDIR)/%.o)
AOBJ      = $(ASRC:%.S=$(OBJDIR)/%.o)
COBJARM   = $(SRCARM:%.c=$(OBJDIR)/%.o)
AOBJARM   = $(ASRCARM:%.S=$(OBJDIR)/%.o)
CPPOBJ    = $(CPPSRC:%.cpp=$(OBJDIR)/%.o)
CPPOBJARM = $(CPPSRCARM:%.cpp=$(OBJDIR)/%.o)

# Define all listing files.
LST = $(ASRC:%.S=$(OBJDIR)/%.lst) $(ASRCARM:%.S=$(OBJDIR)/%.lst)
$(SRC:%.c=$(OBJDIR)/%.lst) $(SRCARM:%.c=$(OBJDIR)/%.lst)
LST += $(CPPSRC:%.cpp=$(OBJDIR)/%.lst)
$(CPPSRCARM:%.cpp=$(OBJDIR)/%.lst)


# Compiler flags to generate dependency files.
### GENDEPFLAGS = -Wp,-M,-MP,-MT,$(*F).o,-MF,.dep/$(@F).d
GENDEPFLAGS = -MD -MP -MF .dep/$(@F).d

# Combine all necessary flags and optional flags.
# Add target processor to flags.
ALL_CFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CFLAGS) $(GENDEPFLAGS)
ALL_CPPFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. $(CPPFLAGS) $(GENDEPFLAGS)
ALL_ASFLAGS = -mcpu=$(MCU) $(THUMB_IW) -I. -x assembler-with-cpp
$(ASFLAGS)

# Default target.
all: begin gccversion mkobjdir sizebefore build sizeafter finished end

## build: elf hex eep lss sym extcoff eeprom
build: elf hex lss sym bin

elf: $(OBJDIR)/$(OUTTARGET).elf
hex: $(OBJDIR)/$(OUTTARGET).hex
eep: $(OBJDIR)/$(OUTTARGET).eep
lss: $(OBJDIR)/$(OUTTARGET).lss
sym: $(OBJDIR)/$(OUTTARGET).sym
bin: $(OBJDIR)/$(OUTTARGET).bin


# Eye candy.
# AVR Studio 3.x does not check make's exit code but relies on
# the following magic strings to be generated by the compile job.
begin:
  @echo
  @echo $(MSG_BEGIN)

mkobjdir:
  if test ! -e $(OBJDIR); then $(MAKEDIR) $(OBJDIR); fi

finished:
  @echo $(MSG_ERRORS_NONE)

versionrename:
  if test -e $(VERSION_INFO_FILE); then $(VERSION_RENAME)
$(OBJDIR)/$(TARGET).hex $(VERSION_INFO_FILE); fi

end:
  @echo $(MSG_END)
  @echo


# Display size of file.
HEXSIZE = $(SIZE) --target=$(FORMAT) $(OBJDIR)/$(OUTTARGET).hex
ELFSIZE = $(SIZE) -A $(OBJDIR)/$(OUTTARGET).elf
sizebefore:
  @if [ -f $(OBJDIR)/$(OUTTARGET).elf ]; then echo; echo
$(MSG_SIZE_BEFORE); $(ELFSIZE); echo; fi

sizeafter:
  @if [ -f $(OBJDIR)/$(OUTTARGET).elf ]; then echo; echo
$(MSG_SIZE_AFTER); $(ELFSIZE); echo; fi


# Display compiler version information.
gccversion :
  @$(CC) --version



# Program the device.
ifeq ($(FLASH_TOOL),ULINK)
# Program the device with Keil's ULINK (needs configured
uVision-Workspace).
program: $(OBJDIR)/$(OUTTARGET).hex
  @echo
  @echo "Programming with ULINK"
  C:\Keil\uv3\Uv3.exe -f ulinkflash.Uv2 -oulinkflash.txt
else
# Program the device.  - lpc21isp will not work for SAM7
program: $(OBJDIR)/$(OUTTARGET).hex
  @echo
  @echo $(MSG_LPC21_RESETREMINDER)
  $(LPC21ISP) $(LPC21ISP_CONTROL) $(LPC21ISP_DEBUG) 
$(LPC21ISP_FLASHFILE)
$(LPC21ISP_PORT) $(LPC21ISP_BAUD) $(LPC21ISP_XTAL)
endif



# Create final output files (.hex, .eep) from ELF output file.
# TODO: handling the .eeprom-section should be redundant
%.hex: %.elf
  @echo
  @echo $(MSG_FLASH) $@
  $(OBJCOPY) -O $(FORMAT) $< $@

%.bin: %.elf
  @echo
  @echo $(MSG_BIN) $@
  $(OBJCOPY) -O binary $< $@


# Create extended listing file from ELF output file.
# testing: option -C
%.lss: %.elf
  @echo
  @echo $(MSG_EXTENDED_LISTING) $@
  $(OBJDUMP) -h -S -C $< > $@


# Create a symbol table from ELF output file.
%.sym: %.elf
  @echo
  @echo $(MSG_SYMBOL_TABLE) $@
  $(NM) -n $< > $@


# Link: create ELF output file from object files.
.SECONDARY : $(OBJDIR)/$(OUTTARGET).elf
.PRECIOUS : $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM)
%.elf:  $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ) $(CPPOBJ) $(CPPOBJARM)
  @echo
  @echo $(MSG_LINKING) $@
#  $(CC) $(THUMB) $(ALL_CPPFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ)
$(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)
  $(CPP) $(THUMB) $(ALL_CPPFLAGS) $(AOBJARM) $(AOBJ) $(COBJARM) $(COBJ)
$(CPPOBJ) $(CPPOBJARM) --output $@ $(LDFLAGS)

# Compile: create object files from C source files. ARM/Thumb
$(COBJ) : $(OBJDIR)/%.o : %.c
  @echo
  @echo $(MSG_COMPILING) $<
  $(CC) -c $(THUMB) $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $(OBJDIR)/$(@F)

# Compile: create object files from C source files. ARM-only
$(COBJARM) : $(OBJDIR)/%.o : %.c
  @echo
  @echo $(MSG_COMPILING_ARM) $<
  $(CC) -c $(ALL_CFLAGS) $(CONLYFLAGS) $< -o $(OBJDIR)/$(@F)

# Compile: create object files from C++ source files. ARM/Thumb
$(CPPOBJ) : $(OBJDIR)/%.o : %.cpp
  @echo
  @echo $(MSG_COMPILINGCPP) $<
#  $(CC) -c $(THUMB) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $< -o $(OBJDIR)/$(@F)
  $(CPP) -c $(THUMB) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $< -o $(OBJDIR)/$(@F)

# Compile: create object files from C++ source files. ARM-only
$(CPPOBJARM) : $(OBJDIR)/%.o : %.cpp
  @echo
  @echo $(MSG_COMPILINGCPP_ARM) $<
#  $(CC) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $< -o $(OBJDIR)/$(@F)
  $(CPP) -c $(ALL_CFLAGS) $(ALL_CPPFLAGS) $< -o $(OBJDIR)/$(@F)


# Assemble: create object files from assembler source files. ARM/Thumb
$(AOBJ) : $(OBJDIR)/%.o : %.S
  @echo
  @echo $(MSG_ASSEMBLING) $<
  $(CC) -c $(THUMB) $(ALL_ASFLAGS) $< -o $(OBJDIR)/$(@F)


# Assemble: create object files from assembler source files. ARM-only
$(AOBJARM) : $(OBJDIR)/%.o : %.S
  @echo
  @echo $(MSG_ASSEMBLING_ARM) $<
  $(CC) -c $(ALL_ASFLAGS) $< -o $(OBJDIR)/$(@F)


# Target: clean project.
clean: begin clean_list finished end
rebuild_all: clean all


##Place in Clean List if other lines are uncommented###$(REMOVE) *.lst

clean_list :
  @echo
  @echo $(MSG_CLEANING)

  $(REMOVE) $(COBJ)
  $(REMOVE) $(CPPOBJ)
  $(REMOVE) $(AOBJ)
  $(REMOVE) $(COBJARM)
  $(REMOVE) $(CPPOBJARM)
  $(REMOVE) $(AOBJARM)
  $(REMOVE) $(LST)

  $(REMOVE) $(OBJDIR)/*
  $(REMOVE) $(SRC:.c=.s)
  $(REMOVE) $(SRC:.c=.d)
  $(REMOVE) $(SRCARM:.c=.s)
  $(REMOVE) $(SRCARM:.c=.d)
  $(REMOVE) $(CPPSRC:.cpp=.s)
  $(REMOVE) $(CPPSRC:.cpp=.d)
  $(REMOVE) $(CPPSRCARM:.cpp=.s)
  $(REMOVE) $(CPPSRCARM:.cpp=.d)
  $(REMOVE) $(DEPDIR)/*


# Include the dependency files.
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)


# Listing of phony targets.
.PHONY : all begin finish end sizebefore sizeafter gccversion \
build elf hex lss sym bin clean clean_list program

Author: Jim Kaz (ancaritha)
Posted on:

Rate this post
0 useful
not useful
Another possible problem could be your linker scripts.  Here are mine
(note, these will look differently than the ones included with most of
the examples- this one has been modified to allow Virtual Functions to
work).

ROM linker script
/*---------------------------------------------------------------------- 
-----*/
/*-         ATMEL Microcontroller Software Support  -  ROUSSET  - */
/*---------------------------------------------------------------------- 
-----*/
/* The software is delivered "AS IS" without warranty or condition of
any    */
/* kind, either express, implied or statutory. This includes without */
/* limitation any warranty or condition with respect to merchantability
or   */
/* fitness for any particular purpose, or against the infringements of
*/
/* intellectual property rights of others.             */
/*---------------------------------------------------------------------- 
-----*/
/*- File source          : GCC_FLASH.ld */
/*- Object               : Linker Script File for Flash Workspace */
/*- Compilation flag     : None */
/*- */
/*- 1.0 11/Mar/05 JPP    : Creation SAM7A3 */
/*---------------------------------------------------------------------- 
-----*/
/* Additional modification by Martin Thomas

/* Memory Definitions */

MEMORY
{
  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000
  RAM (rw) : ORIGIN = 0x00200000, LENGTH = 0x00008000
  STACK (rw) : ORIGIN = 0x00208000,LENGTH = 0x00000000
}


/* Section Definitions */

SECTIONS
{
  /* first section is .text which is used for code */
   .text :
  {
  *SAM7A3Assembly.o (.text)            /* Startup code */
  *(.text .text.*)           /* remaining code */
  *(.gnu.linkonce.t.*)
  *(.glue_7)
  *(.glue_7t)
  *(.gcc_except_table)
  *(.rodata)                 /* read-only data (constants) */
  *(.rodata*)
  *(.gnu.linkonce.r.*)
  } > ROM

  . = ALIGN(4);

  /* .ctors .dtors are used for c++ constructors/destructors */
  /* added by Martin Thomas 4/2005 based on Anglia Design example */
  .ctors :
  {
    PROVIDE(_ctors_start_ = .);
    KEEP(*(SORT(.ctors.*)))
    KEEP(*(.ctors))
    PROVIDE(_ctors_end_ = .);
  } >ROM

  .dtors :
  {
    PROVIDE(_dtors_start_ = .);
    KEEP(*(SORT(.dtors.*)))
    KEEP(*(.dtors))
    PROVIDE(_dtors_end_ = .);
  } >ROM

    . = ALIGN(4);
  /* mthomas - end */

  _etext = . ;
  PROVIDE (etext = .);

  /* .data section which is used for initialized data */
  .data : AT (_etext)
  {
    _data = .;
    *(.data)
  *(.data.*)
  *(.gnu.linkonce.d*)
  SORT(CONSTRUCTORS) /* mt 4/2005 */
  . = ALIGN(4);

  } > RAM

  . = ALIGN(4);
  _edata = . ;
  PROVIDE (edata = .);

  /* .bss section which is used for uninitialized data */
  .bss (NOLOAD) :
  {
    __bss_start = . ;
    _bss_start_ = . ;
    *(.bss)
  *(.gnu.linkonce.b*)
    *(COMMON)
    . = ALIGN(4);
  } > RAM

  . = ALIGN(4);
  _bss_end_ = . ;
  PROVIDE (__bss_end = .);

  _end = . ;
  PROVIDE (end = .);

  . = ALIGN(4);
   .int_data :
   {
   *(.internal_ram_top)
   }> STACK

  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the
beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }

}



RAM linker script
/*---------------------------------------------------------------------- 
-----*/
/*-         ATMEL Microcontroller Software Support  -  ROUSSET  - */
/*---------------------------------------------------------------------- 
-----*/
/* The software is delivered "AS IS" without warranty or condition of
any    */
/* kind, either express, implied or statutory. This includes without */
/* limitation any warranty or condition with respect to merchantability
or   */
/* fitness for any particular purpose, or against the infringements of
*/
/* intellectual property rights of others.             */
/*---------------------------------------------------------------------- 
-----*/
/*- File source          : GCC_FLASH.ld */
/*- Object               : Linker Script File for Flash Workspace */
/*- Compilation flag     : None */
/*- */
/*- 1.0 11/Mar/05 JPP    : Creation SAM7A3 */
/*---------------------------------------------------------------------- 
-----*/
/* Additional modification by Martin Thomas

/* Memory Definitions */

MEMORY
{
  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00007000
  RAM (rw) : ORIGIN = 0x00007000, LENGTH = 0x00001000
  STACK (rw) : ORIGIN = 0x00007000,LENGTH = 0x00000000
}


/* Section Definitions */

SECTIONS
{
  /* first section is .text which is used for code */
   .text :
  {
  *SAM7A3Assembly.o (.text)            /* Startup code */
  *(.text .text.*)           /* remaining code */
  *(.gnu.linkonce.t.*)
  *(.glue_7)
  *(.glue_7t)
  *(.gcc_except_table)
  *(.rodata)                 /* read-only data (constants) */
  *(.rodata*)
  *(.gnu.linkonce.r.*)
  } > RAM

  . = ALIGN(4);

  /* .ctors .dtors are used for c++ constructors/destructors */
  /* added by Martin Thomas 4/2005 based on Anglia Design example */
  .ctors :
  {
    PROVIDE(_ctors_start_ = .);
    KEEP(*(SORT(.ctors.*)))
    KEEP(*(.ctors))
    PROVIDE(_ctors_end_ = .);
  } >RAM

  .dtors :
  {
    PROVIDE(_dtors_start_ = .);
    KEEP(*(SORT(.dtors.*)))
    KEEP(*(.dtors))
    PROVIDE(_dtors_end_ = .);
  } >RAM

    . = ALIGN(4);
  /* mthomas - end */

  _etext = . ;
  PROVIDE (etext = .);

  /* .data section which is used for initialized data */
  .data :
  {
    _data = .;
    *(.data)
  *(.data.*)
  *(.gnu.linkonce.d*)
  SORT(CONSTRUCTORS) /* mt 4/2005 */
  } > RAM

  . = ALIGN(4);
  _edata = . ;
  PROVIDE (edata = .);

  /* .bss section which is used for uninitialized data */
  .bss (NOLOAD) :
  {
    __bss_start = . ;
    _bss_start_ = . ;
    *(.bss)
  *(.gnu.linkonce.b*)
    *(COMMON)
    . = ALIGN(4);
  } > RAM

  . = ALIGN(4);
  _bss_end_ = . ;
  PROVIDE (__bss_end = .);

  _end = . ;
  PROVIDE (end = .);

  . = ALIGN(4);
   .int_data :
   {
   *(.internal_ram_top)
   }> STACK

  /* Stabs debugging sections.  */
  .stab          0 : { *(.stab) }
  .stabstr       0 : { *(.stabstr) }
  .stab.excl     0 : { *(.stab.excl) }
  .stab.exclstr  0 : { *(.stab.exclstr) }
  .stab.index    0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }
  .comment       0 : { *(.comment) }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the
beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }

}




And the assembly file, which I've changed a little bit for use with C++
and Virtual Functions, again with Martin's help.
/*---------------------------------------------------------------------- 
--------
//*-         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*--------------------------------------------------------------------- 
---------
//* The software is delivered "AS IS" without warranty or condition of
any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability
or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*--------------------------------------------------------------------- 
--------
//*- File source          : SAM7A3Assembly.s
//*- Object               : Generic CStartup for KEIL and GCC No Use
REMAP
//*- Compilation flag     : None
//*-
//*- 1.0 10/Mar/05 JPP    : Creation
//*- 1.1 01/Apr/05 JPP    : save SPSR
//*--------------------------------------------------------------------- 
--------*/

     .equ   IRQ_Stack_Size,     0x00000060

/* #include "AT91SAM7A3_inc.h"    */

  .equ AIC_IVR,         (256)
  .equ AIC_FVR,         (260)
  .equ AIC_EOICR,       (304)
  .equ AT91C_BASE_AIC,  (0xFFFFF000)

#;---------------------------------------------------------------------- 
--------
#;- Section Definition
#;-----------------
#;-  Section
#;- .internal_ram_top   Top_Stack: used by the cstartup for vector
initalisation
#;-      management defined by ld and affect from ldscript
#;---------------------------------------------------------------------- 
--------
  .section   .internal_ram_top
  .code 32
  .align   0
  .global  Top_Stack
Top_Stack:

/*---------------------------------------------------------------------- 
--------
*- Area Definition
*----------------------------------------------------------------------- 
-------
* .text is used instead of .section .text so it works with arm-aout too.
*/
        .section   .reset
        .text
        .global _startup
        .func   _startup
_startup:
reset:
/*---------------------------------------------------------------------- 
--------
//*- Exception vectors
//*--------------------
//*- These vectors can be read at address 0 or at RAM address
//*- They ABSOLUTELY requires to be in relative addresssing mode in
order to
//*- guarantee a valid jump. For the moment, all are just looping.
//*- If an exception occurs before remap, this would result in an
infinite loop.
//*- To ensure if a exeption occurs before start application to infinite
loop.
//*--------------------------------------------------------------------- 
---------*/

                B           InitReset           /* 0x00 Reset handler */
undefvec:
                B           undefvec            /* 0x04 Undefined
Instruction */
swivec:
                B           swivec              /* 0x08 Software
Interrupt */
pabtvec:
                B           pabtvec             /* 0x0C Prefetch Abort
*/
dabtvec:
                B           dabtvec             /* 0x10 Data Abort */
rsvdvec:
                B           rsvdvec             /* 0x14 reserved  */
irqvec:
                B           IRQ_Handler_Entry   /* 0x18 IRQ   */
fiqvec:                                   /* 0x1c FIQ  */
/*---------------------------------------------------------------------- 
--------
//*- Function             : FIQ_Handler_Entry
//*- Treatments           : FIQ Controller Interrupt Handler.
//*- Called Functions     : AIC_FVR[interrupt]
//*--------------------------------------------------------------------- 
---------*/

FIQ_Handler_Entry:

/*- Switch in SVC/User Mode to allow User Stack access for C code   */
/* because the FIQ is not yet acknowledged*/

/*- Save and r0 in FIQ_Register */
            mov         r9,r0
          ldr         r0 , [r8, #AIC_FVR]
            msr         CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC

/*- Save scratch/used registers and LR in User Stack */
            stmfd       sp!, { r1-r3, r12, lr}

/*- Branch to the routine pointed by the AIC_FVR */
            mov         r14, pc
            bx          r0

/*- Restore scratch/used registers and LR from User Stack */
            ldmia       sp!, { r1-r3, r12, lr}

/*- Leave Interrupts disabled and switch back in FIQ mode */
            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ

/*- Restore the R0 ARM_MODE_SVC register */
            mov         r0,r9

/*- Restore the Program Counter using the LR_fiq directly in the PC */
            subs        pc,lr,#4
  .align 0
.RAM_TOP:
  .word  Top_Stack

InitReset:
/*---------------------------------------------------------------------- 
--------
/*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
/*---------------------------------------------------------------------- 
--------*/
              .extern   AT91F_LowLevelInit
/*- minumum C initialization */
/*- call  AT91F_LowLevelInit( void) */

            ldr     r13,.RAM_TOP            /* temporary stack in
internal RAM */
/*--Call Low level init function in ABSOLUTE through the Interworking 
*/
          ldr      r0,=AT91F_LowLevelInit
            mov     lr, pc
          bx      r0
/*---------------------------------------------------------------------- 
--------
//*- Stack Sizes Definition
//*------------------------
//*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when
using
//*- the vectoring. This assume that the IRQ management.
//*- The Interrupt Stack must be adjusted depending on the interrupt
handlers.
//*- Fast Interrupt not requires stack If in your application it
required you must
//*- be definehere.
//*- The System stack size is not defined and is limited by the free
internal
//*- SRAM.
//*--------------------------------------------------------------------- 
---------*/

/*---------------------------------------------------------------------- 
--------
//*- Top of Stack Definition
//*-------------------------
//*- Interrupt and Supervisor Stack are located at the top of internal
memory in
//*- order to speed the exception handling context saving and restoring.
//*- ARM_MODE_SVC (Application, C) Stack is located at the top of the
external memory.
//*--------------------------------------------------------------------- 
---------*/

    .EQU    IRQ_STACK_SIZE,    (3*8*4)
          .EQU    ARM_MODE_FIQ,       0x11
          .EQU    ARM_MODE_IRQ,       0x12
          .EQU    ARM_MODE_SVC,       0x13

          .EQU    I_BIT,              0x80
          .EQU    F_BIT,              0x40

/*---------------------------------------------------------------------- 
--------
//*- Setup the stack for each mode
//*-------------------------------*/
                mov     r0,r13

/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
                msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
/*- Init the FIQ register*/
              ldr     r8, =AT91C_BASE_AIC

/*- Set up Interrupt Mode and set IRQ Mode Stack*/
                msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
                mov     r13, r0                     /* Init stack IRQ */
                sub     r0, r0, #IRQ_Stack_Size
/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
                msr     CPSR_c, #ARM_MODE_SVC
                mov     r13, r0                     /* Init stack Sup */

/*- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode
Stack*/

# Relocate .data section (Copy from ROM to RAM)
                LDR     R1, =_etext
                LDR     R2, =_data
                LDR     R3, =_edata
LoopRel:        CMP     R2, R3
                LDRLO   R0, [R1], #4
                STRLO   R0, [R2], #4
                BLO     LoopRel

# Clear .bss section (Zero init)
                MOV     R0, #0
                LDR     R1, =__bss_start__
                LDR     R2, =__bss_end__
LoopZI:         CMP     R1, R2
                STRLO   R0, [R1], #4
                BLO     LoopZI

/*
   Call C++ constructors (for objects in "global scope")
   ctor loop added by Martin Thomas 4/2005
   based on a Anglia Design example-application for ST ARM
*/

    LDR   r0, =__ctors_start__
    LDR   r1, =__ctors_end__
ctor_loop:
    CMP   r0, r1
    BEQ   ctor_end
    LDR   r2, [r0], #4
    STMFD   sp!, {r0-r1}
    MOV   lr, pc
    //MOV   pc, r2
    BX  R2
    LDMFD   sp!, {r0-r1}
    B    ctor_loop
ctor_end:

// Call main program: main(0)
// --------------------------
        mov   r0,#0                     // no arguments (argc = 0)
        mov   r1,r0
        mov   r2,r0
        mov   fp,r0                     // null frame pointer
        mov   r7,r0                     // null frame pointer for thumb
        ldr   r10,=main
        mov   lr,pc
        bx    r10                       // enter main()


/*
        ldr  lr,=exit
    ldr  r0,=main
    bx  r0
*/

/* "global object"-dtors are never called and it should not be
   needed since there is no OS to exit to. */

        .size   _startup, . - _startup
        .endfunc

/* "exit" dummy added by mthomas to avoid sbrk write read etc. needed
   by the newlib default "exit" */
        .global exit, abort
        .func   exit, abort
exit:
abort:
        b    .
    .size   exit, . - exit
        .endfunc

/*---------------------------------------------------------------------- 
--------
//*- Manage exception
//*---------------
//*- This module The exception must be ensure in ARM mode
//*--------------------------------------------------------------------- 
---------
//*--------------------------------------------------------------------- 
---------
//*- Function             : IRQ_Handler_Entry
//*- Treatments           : IRQ Controller Interrupt Handler.
//*- Called Functions     : AIC_IVR[interrupt]
//*--------------------------------------------------------------------- 
---------*/
        .global IRQ_Handler_Entry
        .func   IRQ_Handler_Entry

IRQ_Handler_Entry:

/*- Manage Exception Entry  */
/*- Adjust and save LR_irq in IRQ stack  */
            sub         lr, lr, #4
            stmfd       sp!, {lr}

/*- Save SPSR need to be saved for nested interrupt */
            mrs         r14, SPSR
            stmfd       sp!, {r14}

/*- Save and r0 in IRQ stack  */
            stmfd       sp!, {r0}

/*- Write in the IVR to support Protect Mode  */
/*- No effect in Normal Mode  */
/*- De-assert the NIRQ and clear the source in Protect Mode */
            ldr         r14, =AT91C_BASE_AIC
      ldr         r0 , [r14, #AIC_IVR]
      str         r14, [r14, #AIC_IVR]

/*- Enable Interrupt and Switch in Supervisor Mode */
            msr         CPSR_c, #ARM_MODE_SVC

/*- Save scratch/used registers and LR in User Stack */
            stmfd       sp!, { r1-r3, r12, r14}

/*- Branch to the routine pointed by the AIC_IVR  */
            mov         r14, pc
            bx          r0
/*- Restore scratch/used registers and LR from User Stack*/
            ldmia       sp!, { r1-r3, r12, r14}

/*- Disable Interrupt and switch back in IRQ mode */
            msr         CPSR_c, #I_BIT | ARM_MODE_IRQ

/*- Mark the End of Interrupt on the AIC */
            ldr         r14, =AT91C_BASE_AIC
            str         r14, [r14, #AIC_EOICR]

/*- Restore SPSR_irq and r0 from IRQ stack */
            ldmia       sp!, {r0}

/*- Restore SPSR_irq and r0 from IRQ stack */
            ldmia       sp!, {r14}
            msr         SPSR_cxsf, r14

/*- Restore adjusted  LR_irq from IRQ stack directly in the PC */
            ldmia       sp!, {pc}^

        .size   IRQ_Handler_Entry, . - IRQ_Handler_Entry
        .endfunc
/*---------------------------------------------------------------
//* ?EXEPTION_VECTOR
//* This module is only linked if needed for closing files.
//*---------------------------------------------------------------*/
        .global AT91F_Default_FIQ_handler
        .func   AT91F_Default_FIQ_handler
AT91F_Default_FIQ_handler:
            b     AT91F_Default_FIQ_handler
        .size   AT91F_Default_FIQ_handler, . - AT91F_Default_FIQ_handler
        .endfunc

        .global AT91F_Default_IRQ_handler
        .func   AT91F_Default_IRQ_handler
AT91F_Default_IRQ_handler:
            b     AT91F_Default_IRQ_handler
        .size   AT91F_Default_IRQ_handler, . - AT91F_Default_IRQ_handler
        .endfunc

        .global AT91F_Spurious_handler
        .func   AT91F_Spurious_handler
AT91F_Spurious_handler:
            b     AT91F_Spurious_handler
        .size   AT91F_Spurious_handler, . - AT91F_Spurious_handler
        .endfunc

        .end

Author: Martin Thomas (Guest)
Posted on:

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Please see the example "Gamma" on my web-page:
http://www.siwawi.arubi.uni-kl.de/avr_projects/arm...

This is an example which should include rather new versions of my
makefile-"template" (with correct handling of bin/hex-output-format) and
newer linker-scripts. Just tested with AT91SAM7S64 and AT91SAM7S256
since I do not own a board with an AT91SAM7A an have not read a SAM7A
datasheet so far. But porting from SAM7S to SAM7A should be easy. Maybe
just a modification of the memory-sizes for the linker-scripts and with
copies of the register-definitions and startup-C-function from example
code for an other compiler/toolchain.

Martin Thomas

Author: Pete Gasper (pgasper)
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Martin Thomas wrote:
> Please see the example "Gamma" on my web-page:
> 
http://www.siwawi.arubi.uni-kl.de/avr_projects/arm...
>

Thanks, that did the trick. I combined your gamma scripts with the Atmel
Keil GCC Basic example code and was able to run/debug that. I'm not
completly sure what my problem was, I think I was fighting a combination
of things. Of note though is that thumb mode compile didn't work and
size optimization didn't operate correctly.

Author: Martin Thomas (Guest)
Posted on:

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Pete Gasper wrote:
> Martin Thomas wrote:
>> Please see the example "Gamma" on my web-page:
>> [...]
>
> Thanks, that did the trick. I combined your gamma scripts with the Atmel
> Keil GCC Basic example code and was able to run/debug that. I'm not
> completly sure what my problem was, I think I was fighting a combination
> of things. Of note though is that thumb mode compile didn't work and
> size optimization didn't operate correctly.

The thumb-problem/optimize-problem might be causes by an bug in gcc. Did
you replace the Keil-specific keyword for interrupts with an
gcc-attribute? The compiler produces incorrect code for
interrupt-routines declared with attribute interrupt/IRQ and compiled
with the thumb-interwork option (maybe only for -Os, but I have not
tested other optimizations myself). This bug is reported in the gcc
bugzilla so hopefully it will be fixed in future versions of gcc.

Workarounds:

- compile ISR-Code without thumb-interwork and do not call functions
compiled in thumb-mode from inside the ISR (Modifications in the
makefile needed, my "template" does not support the option to compile
some files without interwork)

- declare the ISR with attribute nacked and use entry/exit-macros as
shown in examples from R O Software, newlib-lpc and some of the examples
that come with WinARM. The method is portable so you can get the idea
from code for other ARM7TDMI controllers too. IRC one of the AT91SAM7S
example from my collection uses this approach too.

- use an Assembler-Wrapper. This is the prefered method in demo-code
from Atmel. This produces a little overhead but no need for attributes,
macros or special compiler-options. See for example code from Atmel
(at91.com) or my "gamma"-example (in Cstartup.S).

Hope this helps
Martin Thomas

Author: Pete Gasper (pgasper)
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So if I compile everything in ARM-MODE, do I need to do anything special
for interrupts to work?

Author: Bastian Heinrich (bahex)
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@JIM KAZ: Could you send me or post your WinARMsyscalls.c and
SAM7Ainit.c files, please?
I have a problem too in getting my source code running an would like to
try your configurations.
Thank you.

Bastian Heinrich

Author: Jim Kaz (ancaritha)
Posted on:

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Bastian Heinrich wrote:
> @JIM KAZ: Could you send me or post your WinARMsyscalls.c and
> SAM7Ainit.c files, please?
> I have a problem too in getting my source code running an would like to
> try your configurations.
> Thank you.
>
> Bastian Heinrich

http://users.wpi.edu/~jimmykaz/Arm/Sam7A3_Virt_Fnct.rar

That Rar file contains my linker scripts, my WinArm.c and init.c files,
makefile, as well as a basic virtual functions example that should work.

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