-- 2 bit teller library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity cnt2bit is port(clk, rst : in std_logic; count : out std_logic_vector(1 downto 0)); end cnt2bit; architecture behavior of cnt2bit is signal internal_count : std_logic_vector(1 downto 0); begin process (clk) begin if (clk'event and clk = '1') then if (rst = '1') then internal_count <= "00"; else internal_count <= internal_count + 1; end if; end if; end process; count <= internal_count; -- copy internal_count to output end behavior;