/******************************************************************************
*                                                                             *
*              Copyright (C),  Philips Semiconductors SLH                     *
*                                                                             *
*  All rights are reserved. Reproduction in whole or in part is prohibited    *
*           without the written consent of the copyright owner.               *
*                                                                             *
*  Philips reserves the right to make changes without notice at any time.     *
* Philips makes no warranty, expressed, implied or statutory, including but   *
* not limited to any implied warranty of merchantibility or fitness for any   *
*   particular purpose, or that the use will not infringe any third party     *
* patent, copyright or trademark. Philips must not be liable for any loss or  *
*                      damage arising from its use.                           *
*                                                                             *
*******************************************************************************
*                                                                             *
*       Project: 336355/105 - Control SW Library for HTRC110/HTRC120/HITAG2   *
*                                                                             *
*       File: REG51.H                                                         *
*       Author:  St. de Zeeuw                                                 *
*                                                                             *
*******************************************************************************/

#ifndef __REG51_H
#define __REG51_H


#include "portab.h"


/*  BYTE Register  */
SFR(P0  ,0x80);
SFR(P1  ,0x90);
SFR(P2  ,0xA0);
SFR(P3  ,0xB0);
SFR(PSW ,0xD0);
SFR(ACC ,0xE0);
SFR(B   ,0xF0);
SFR(SP  ,0x81);
SFR(DPL ,0x82);
SFR(DPH ,0x83);
SFR(PCON,0x87);
SFR(TCON,0x88);
SFR(TMOD,0x89);
SFR(TL0 ,0x8A);
SFR(TL1 ,0x8B);
SFR(TH0 ,0x8C);
SFR(TH1 ,0x8D);
SFR(IE  ,0xA8);
SFR(IP  ,0xB8);
SFR(SCON,0x98);
SFR(SBUF,0x99);


/*  BIT Register  */
/*  PSW   */
SBIT(CY  ,0xD7);
SBIT(AC  ,0xD6);
SBIT(F0  ,0xD5);
SBIT(RS1 ,0xD4);
SBIT(RS0 ,0xD3);
SBIT(OV  ,0xD2);
SBIT(P   ,0xD0);

/*  TCON  */
SBIT(TF1 ,0x8F);
SBIT(TR1 ,0x8E);
SBIT(TF0 ,0x8D);
SBIT(TR0 ,0x8C);
SBIT(IE1 ,0x8B);
SBIT(IT1 ,0x8A);
SBIT(IE0 ,0x89);
SBIT(IT0 ,0x88);

/*  IE   */
SBIT(EA  ,0xAF);
SBIT(ES  ,0xAC);
SBIT(ET1 ,0xAB);
SBIT(EX1 ,0xAA);
SBIT(ET0 ,0xA9);
SBIT(EX0 ,0xA8);

/*  IP   */ 
SBIT(PS  ,0xBC);
SBIT(PT1 ,0xBB);
SBIT(PX1 ,0xBA);
SBIT(PT0 ,0xB9);
SBIT(PX0 ,0xB8);

/*  SCON  */
SBIT(SM0 ,0x9F);
SBIT(SM1 ,0x9E);
SBIT(SM2 ,0x9D);
SBIT(REN ,0x9C);
SBIT(TB8 ,0x9B);
SBIT(RB8 ,0x9A);
SBIT(TI  ,0x99);
SBIT(RI  ,0x98);

/*  P3 special */
SBIT(RD  ,0xB7);
SBIT(WR  ,0xB6);
SBIT(T1  ,0xB5);
SBIT(T0  ,0xB4);
SBIT(INT1,0xB3);
SBIT(INT0,0xB2);
SBIT(TXD ,0xB1);
SBIT(RXD ,0xB0);

/* P0 */

SBIT(P0_0,0x80);
SBIT(P0_1,0x81);
SBIT(P0_2,0x82);
SBIT(P0_3,0x83);
SBIT(P0_4,0x84);
SBIT(P0_5,0x85);
SBIT(P0_6,0x86);
SBIT(P0_7,0x87);

/* P1 */

SBIT(P1_0,0x90);
SBIT(P1_1,0x91);
SBIT(P1_2,0x92);
SBIT(P1_3,0x93);
SBIT(P1_4,0x94);
SBIT(P1_5,0x95);
SBIT(P1_6,0x96);
SBIT(P1_7,0x97);

/* P2 */

SBIT(P2_0,0xA0);
SBIT(P2_1,0xA1);
SBIT(P2_2,0xA2);
SBIT(P2_3,0xA3);
SBIT(P2_4,0xA4);
SBIT(P2_5,0xA5);
SBIT(P2_6,0xA6);
SBIT(P2_7,0xA7);

/* P3 */

SBIT(P3_0,0xB0);
SBIT(P3_1,0xB1);
SBIT(P3_2,0xB2);
SBIT(P3_3,0xB3);
SBIT(P3_4,0xB4);
SBIT(P3_5,0xB5);
SBIT(P3_6,0xB6);
SBIT(P3_7,0xB7);


#endif /* __REG51_H */
