********** Mapped Logic ********** |
FDCPE_J1P10: FDCPE port map (J1P10,NOT XLXI_1/A1_M,MPCIN,'0','0',N_PZ_225); |
FDCPE_J1P7: FDCPE port map (J1P7,XLXI_1/A0_M,MPCIN,'0','0',N_PZ_225); |
FDCPE_J1P8: FDCPE port map (J1P8,NOT XLXI_1/A0_M,MPCIN,'0','0',N_PZ_225); |
FDCPE_J1P9: FDCPE port map (J1P9,XLXI_1/A1_M,MPCIN,'0','0',N_PZ_225); |
N_PZ_197 <= ((XLXI_1/position(11))
OR (XLXI_1/position(12)) OR (XLXI_1/position(10) AND XLXI_1/position(6) AND N_PZ_247 AND XLXI_1/position(5))); |
N_PZ_203 <= ((NOT XLXI_1/position_not0002)
OR (NOT XLXI_1/position(6) AND N_PZ_221 AND NOT XLXI_1/position(7))); |
N_PZ_221 <= N_PZ_261
XOR ((N_PZ_261 AND XLXI_1/position(3) AND XLXI_1/position(4) AND XLXI_1/position(5)) OR (NOT N_PZ_261 AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND NOT XLXI_1/position(4) AND NOT XLXI_1/position(5) AND NOT XLXI_1/position(2))); |
N_PZ_223 <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000)
OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(12)) OR (NOT XLXI_1/position(6) AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(12)) OR (NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND NOT XLXI_1/position(7)) OR (NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND NOT XLXI_1/position(4) AND NOT XLXI_1/position(5)) OR (NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND NOT XLXI_1/position(5) AND NOT XLXI_1/position(2))); |
N_PZ_225 <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND N_PZ_197)
OR (XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(6) AND XLXI_1/position(3) AND XLXI_1/position(4) AND N_PZ_247) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(6) AND XLXI_1/position(1) AND XLXI_1/position(4) AND N_PZ_247) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(6) AND XLXI_1/position(0) AND XLXI_1/position(4) AND N_PZ_247) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(6) AND XLXI_1/position(4) AND N_PZ_247 AND XLXI_1/position(2))); |
N_PZ_247 <= (XLXI_1/position(8) AND XLXI_1/position(9) AND
XLXI_1/position(7)); |
N_PZ_261 <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000)
OR (NOT XLXI_1/position(11) AND NOT XLXI_1/position(12))); |
N_PZ_269 <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND N_PZ_197)
OR (XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(6) AND XLXI_1/position(4) AND N_PZ_247)); |
FTCPE_XLXI_1/A0_M: FTCPE port map (XLXI_1/A0_M,XLXI_1/A0_M_T,MPCIN,'0','0','1');
XLXI_1/A0_M_T <= ((XLXI_1/A1_M AND NOT XLXI_1/c_TTL_M AND N_PZ_225 AND NOT XLXI_1/A0_M) OR (NOT XLXI_1/A1_M AND NOT XLXI_1/c_TTL_M AND N_PZ_225 AND XLXI_1/A0_M)); |
FTCPE_XLXI_1/A1_M: FTCPE port map (XLXI_1/A1_M,XLXI_1/A1_M_T,MPCIN,'0','0','1');
XLXI_1/A1_M_T <= ((XLXI_1/A1_M AND NOT XLXI_1/c_TTL_M AND N_PZ_225 AND XLXI_1/A0_M) OR (NOT XLXI_1/A1_M AND NOT XLXI_1/c_TTL_M AND N_PZ_225 AND NOT XLXI_1/A0_M)); |
FDCPE_XLXI_1/btn0_M: FDCPE port map (XLXI_1/btn0_M,XLXI_1/btn0_M_D,MPCIN,'0','0','1');
XLXI_1/btn0_M_D <= ((btn0 AND XLXI_1/btn0_M) OR (NOT XLXI_1/position(12) AND btn0 AND NOT XLXI_1/btn0_M) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(11) AND btn0 AND NOT XLXI_1/btn0_M AND NOT N_PZ_247) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(6) AND NOT XLXI_1/position(11) AND btn0 AND NOT XLXI_1/btn0_M AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(4) AND NOT XLXI_1/position(5))); |
FDCPE_XLXI_1/c_TTL0: FDCPE port map (XLXI_1/c_TTL(0),XLXI_1/c_TTL_D(0),MPCIN,'0','0','1');
XLXI_1/c_TTL_D(0) <= (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND NOT XLXI_1/c_TTL(0)); |
FDCPE_XLXI_1/c_TTL1: FDCPE port map (XLXI_1/c_TTL(1),XLXI_1/c_TTL_D(1),MPCIN,'0','0','1');
XLXI_1/c_TTL_D(1) <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND NOT XLXI_1/c_TTL(1)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND NOT XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1))); |
FTCPE_XLXI_1/c_TTL2: FTCPE port map (XLXI_1/c_TTL(2),XLXI_1/c_TTL_T(2),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(2) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(2)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1))); |
FTCPE_XLXI_1/c_TTL3: FTCPE port map (XLXI_1/c_TTL(3),XLXI_1/c_TTL_T(3),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(3) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(3)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2))); |
FTCPE_XLXI_1/c_TTL4: FTCPE port map (XLXI_1/c_TTL(4),XLXI_1/c_TTL_T(4),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(4) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(4)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3))); |
FTCPE_XLXI_1/c_TTL5: FTCPE port map (XLXI_1/c_TTL(5),XLXI_1/c_TTL_T(5),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(5) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(5)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4))); |
FTCPE_XLXI_1/c_TTL6: FTCPE port map (XLXI_1/c_TTL(6),XLXI_1/c_TTL_T(6),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(6) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(6)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5))); |
FTCPE_XLXI_1/c_TTL7: FTCPE port map (XLXI_1/c_TTL(7),XLXI_1/c_TTL_T(7),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(7) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(7)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6))); |
FTCPE_XLXI_1/c_TTL8: FTCPE port map (XLXI_1/c_TTL(8),XLXI_1/c_TTL_T(8),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(8) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(8)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7))); |
FTCPE_XLXI_1/c_TTL9: FTCPE port map (XLXI_1/c_TTL(9),XLXI_1/c_TTL_T(9),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(9) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(9)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8))); |
FTCPE_XLXI_1/c_TTL10: FTCPE port map (XLXI_1/c_TTL(10),XLXI_1/c_TTL_T(10),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(10) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(10)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9))); |
FTCPE_XLXI_1/c_TTL11: FTCPE port map (XLXI_1/c_TTL(11),XLXI_1/c_TTL_T(11),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(11) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(11)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9))); |
FTCPE_XLXI_1/c_TTL12: FTCPE port map (XLXI_1/c_TTL(12),XLXI_1/c_TTL_T(12),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(12) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(12)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11))); |
FTCPE_XLXI_1/c_TTL13: FTCPE port map (XLXI_1/c_TTL(13),XLXI_1/c_TTL_T(13),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(13) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(13)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND XLXI_1/c_TTL(12))); |
FTCPE_XLXI_1/c_TTL14: FTCPE port map (XLXI_1/c_TTL(14),XLXI_1/c_TTL_T(14),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(14) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(14)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13))); |
FTCPE_XLXI_1/c_TTL15: FTCPE port map (XLXI_1/c_TTL(15),XLXI_1/c_TTL_T(15),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(15) <= ((XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(15)) OR (NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13) AND XLXI_1/c_TTL(14))); |
FTCPE_XLXI_1/c_TTL16: FTCPE port map (XLXI_1/c_TTL(16),XLXI_1/c_TTL_T(16),MPCIN,'0','0','1');
XLXI_1/c_TTL_T(16) <= (XLXI_1/c_TTL(0) AND XLXI_1/c_TTL(10) AND XLXI_1/c_TTL(1) AND XLXI_1/c_TTL(2) AND XLXI_1/c_TTL(3) AND XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND XLXI_1/c_TTL(7) AND XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13) AND XLXI_1/c_TTL(14) AND XLXI_1/c_TTL(15)); |
FDCPE_XLXI_1/c_TTL_M: FDCPE port map (XLXI_1/c_TTL_M,XLXI_1/c_TTL_M_D,MPCIN,'0','0','1');
XLXI_1/c_TTL_M_D <= ((XLXI_1/c_TTL_M AND NOT XLXI_1/c_TTL_M_cmp_eq0000) OR (NOT XLXI_1/c_TTL_M AND N_PZ_225)); |
XLXI_1/c_TTL_M_cmp_eq0000 <= (NOT XLXI_1/c_TTL(0) AND NOT XLXI_1/c_TTL(10) AND
NOT XLXI_1/c_TTL(1) AND NOT XLXI_1/c_TTL(2) AND NOT XLXI_1/c_TTL(3) AND NOT XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND NOT XLXI_1/c_TTL(7) AND NOT XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND NOT XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13) AND XLXI_1/c_TTL(14) AND XLXI_1/c_TTL(15) AND NOT XLXI_1/c_TTL(16)); |
FTCPE_XLXI_1/position0: FTCPE port map (XLXI_1/position(0),XLXI_1/position_T(0),MPCIN,'0','0','1');
XLXI_1/position_T(0) <= (N_PZ_225 AND XLXI_1/position_not0002); |
FTCPE_XLXI_1/position1: FTCPE port map (XLXI_1/position(1),XLXI_1/position_T(1),MPCIN,'0','0','1');
XLXI_1/position_T(1) <= (N_PZ_225 AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002); |
FTCPE_XLXI_1/position2: FTCPE port map (XLXI_1/position(2),XLXI_1/position_T(2),MPCIN,'0','0','1');
XLXI_1/position_T(2) <= (N_PZ_225 AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002); |
FTCPE_XLXI_1/position3: FTCPE port map (XLXI_1/position(3),XLXI_1/position_T(3),MPCIN,'0','0','1');
XLXI_1/position_T(3) <= ((XLXI_1/position_not0002 AND NOT N_PZ_269) OR (NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002 AND NOT XLXI_1/position(2))); |
FTCPE_XLXI_1/position4: FTCPE port map (XLXI_1/position(4),XLXI_1/position_T(4),MPCIN,'0','0','1');
XLXI_1/position_T(4) <= ((XLXI_1/position(3) AND XLXI_1/position_not0002 AND NOT N_PZ_269) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002 AND N_PZ_197 AND NOT XLXI_1/position(2))); |
FTCPE_XLXI_1/position5: FTCPE port map (XLXI_1/position(5),XLXI_1/position_T(5),MPCIN,'0','0','1');
XLXI_1/position_T(5) <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(3) AND XLXI_1/position_not0002 AND XLXI_1/position(4)) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND XLXI_1/position(3) AND XLXI_1/position_not0002 AND XLXI_1/position(4)) OR (NOT XLXI_1/position(6) AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND XLXI_1/position(3) AND XLXI_1/position_not0002 AND XLXI_1/position(4)) OR (NOT XLXI_1/position(11) AND NOT XLXI_1/position(12) AND XLXI_1/position(3) AND XLXI_1/position_not0002 AND XLXI_1/position(4) AND NOT N_PZ_247) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002 AND NOT XLXI_1/position(4) AND N_PZ_197 AND NOT XLXI_1/position(2))); |
FTCPE_XLXI_1/position6: FTCPE port map (XLXI_1/position(6),XLXI_1/position_T(6),MPCIN,'0','0','1');
XLXI_1/position_T(6) <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000 AND N_PZ_221 AND XLXI_1/position_not0002) OR (NOT XLXI_1/position(10) AND N_PZ_221 AND XLXI_1/position_not0002) OR (NOT XLXI_1/position(6) AND N_PZ_221 AND XLXI_1/position_not0002) OR (N_PZ_221 AND XLXI_1/position_not0002 AND NOT N_PZ_247) OR (N_PZ_221 AND XLXI_1/position_not0002 AND NOT XLXI_1/position(4) AND NOT XLXI_1/position(5)) OR (N_PZ_221 AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(1) AND NOT XLXI_1/position(0) AND XLXI_1/position_not0002 AND NOT XLXI_1/position(5) AND NOT XLXI_1/position(2))); |
FTCPE_XLXI_1/position7: FTCPE port map (XLXI_1/position(7),XLXI_1/position_T(7),MPCIN,'0','0','1');
XLXI_1/position_T(7) <= (NOT XLXI_1/position(6) AND N_PZ_221 AND XLXI_1/position_not0002); |
FTCPE_XLXI_1/position8: FTCPE port map (XLXI_1/position(8),XLXI_1/position_T(8),MPCIN,'0','0','1');
XLXI_1/position_T(8) <= ((NOT N_PZ_225 AND NOT N_PZ_203) OR (NOT XLXI_1/c_TTL(0) AND NOT XLXI_1/c_TTL(10) AND NOT XLXI_1/c_TTL(1) AND NOT XLXI_1/c_TTL(2) AND NOT XLXI_1/c_TTL(3) AND NOT XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND NOT XLXI_1/c_TTL(7) AND NOT XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND NOT XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13) AND XLXI_1/c_TTL(14) AND XLXI_1/c_TTL(15) AND NOT XLXI_1/c_TTL(16) AND N_PZ_225 AND N_PZ_203 AND N_PZ_197) OR (NOT XLXI_1/c_TTL(0) AND NOT XLXI_1/c_TTL(10) AND NOT XLXI_1/c_TTL(1) AND NOT XLXI_1/c_TTL(2) AND NOT XLXI_1/c_TTL(3) AND NOT XLXI_1/c_TTL(4) AND XLXI_1/c_TTL(5) AND XLXI_1/c_TTL(6) AND NOT XLXI_1/c_TTL(7) AND NOT XLXI_1/c_TTL(8) AND XLXI_1/c_TTL(9) AND XLXI_1/c_TTL(11) AND NOT XLXI_1/c_TTL(12) AND XLXI_1/c_TTL(13) AND XLXI_1/c_TTL(14) AND XLXI_1/c_TTL(15) AND NOT XLXI_1/c_TTL(16) AND N_PZ_203 AND btn0 AND NOT XLXI_1/btn0_M AND N_PZ_197)); |
FTCPE_XLXI_1/position9: FTCPE port map (XLXI_1/position(9),XLXI_1/position_T(9),MPCIN,'0','0','1');
XLXI_1/position_T(9) <= ((XLXI_1/position(8) AND NOT N_PZ_203 AND N_PZ_223) OR (XLXI_1/position(8) AND NOT N_PZ_203 AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(9) AND NOT XLXI_1/position(12)) OR (NOT XLXI_1/position(8) AND NOT XLXI_1/position(6) AND N_PZ_221 AND NOT N_PZ_261 AND XLXI_1/position_not0002 AND NOT XLXI_1/position(7))); |
FTCPE_XLXI_1/position10: FTCPE port map (XLXI_1/position(10),XLXI_1/position_T(10),MPCIN,'0','0','1');
XLXI_1/position_T(10) <= ((XLXI_1/position(8) AND NOT N_PZ_203 AND XLXI_1/position(9) AND N_PZ_223) OR (NOT XLXI_1/position(8) AND NOT XLXI_1/position(6) AND N_PZ_221 AND NOT N_PZ_261 AND NOT XLXI_1/position(9) AND XLXI_1/position_not0002 AND NOT XLXI_1/position(7))); |
FTCPE_XLXI_1/position11: FTCPE port map (XLXI_1/position(11),XLXI_1/position_T(11),MPCIN,'0','0','1');
XLXI_1/position_T(11) <= ((XLXI_1/position(10) AND XLXI_1/position(8) AND NOT N_PZ_203 AND XLXI_1/position(9) AND N_PZ_223) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(8) AND N_PZ_203 AND NOT XLXI_1/position(9) AND XLXI_1/position_not0002 AND NOT N_PZ_223)); |
FTCPE_XLXI_1/position12: FTCPE port map (XLXI_1/position(12),XLXI_1/position_T(12),MPCIN,'0','0','1');
XLXI_1/position_T(12) <= ((NOT XLXI_1/c_TTL_M_cmp_eq0000 AND XLXI_1/position(10) AND XLXI_1/position(8) AND NOT N_PZ_203 AND XLXI_1/position(11) AND XLXI_1/position(9)) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND N_PZ_225 AND NOT XLXI_1/position(10) AND NOT XLXI_1/position(8) AND NOT XLXI_1/position(6) AND N_PZ_221 AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(9) AND XLXI_1/position(12) AND NOT XLXI_1/position(7)) OR (XLXI_1/c_TTL_M_cmp_eq0000 AND NOT XLXI_1/position(10) AND NOT XLXI_1/position(8) AND NOT XLXI_1/position(6) AND N_PZ_221 AND NOT XLXI_1/position(11) AND NOT XLXI_1/position(9) AND XLXI_1/position(12) AND btn0 AND NOT XLXI_1/btn0_M AND NOT XLXI_1/position(7))); |
XLXI_1/position_not0002 <= ((N_PZ_225)
OR (XLXI_1/c_TTL_M_cmp_eq0000 AND btn0 AND NOT XLXI_1/btn0_M) OR (NOT XLXI_1/position(12) AND btn0 AND NOT XLXI_1/btn0_M) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(11) AND btn0 AND NOT XLXI_1/btn0_M AND NOT N_PZ_247) OR (NOT XLXI_1/position(10) AND NOT XLXI_1/position(6) AND NOT XLXI_1/position(11) AND btn0 AND NOT XLXI_1/btn0_M AND NOT XLXI_1/position(3) AND NOT XLXI_1/position(4) AND NOT XLXI_1/position(5))); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FDDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); FTDCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |