LIBRARY ieee ; USE ieee.std_logic_1164.all ; USE ieee.std_logic_arith.all ; ENTITY comp_sc IS port ( e : in std_logic_vector ; Sel : in std_logic_vector(2 downto 0); s : out std_logic_vector ); END ; ARCHITECTURE arch_comp_sc OF comp_sc IS SIGNAL data_in_WCDMA : std_logic_vector (24 downto 0); SIGNAL scram_en_WCDMA: std_logic; SIGNAL scram_rst_WCDMA: std_logic; SIGNAL rst_WCDMA: std_logic; SIGNAL clk_WCDMA : std_logic; SIGNAL data_out_WCDMA : std_logic_vector (24 downto 0); SIGNAL data_in_UMTS : std_logic_vector (16 downto 0); SIGNAL scram_en_UMTS: std_logic; SIGNAL scram_rst_UMTS: std_logic; SIGNAL rst_UMTS: std_logic; SIGNAL clk_UMTS : std_logic; SIGNAL data_out_UMTS : std_logic_vector (16 downto 0); SIGNAL data_in_GSM : std_logic_vector (30 downto 0); SIGNAL scram_en_GSM: std_logic; SIGNAL scram_rst_GSM: std_logic; SIGNAL rst_GSM: std_logic; SIGNAL clk_GSM : std_logic; SIGNAL data_out_GSM : std_logic_vector (30 downto 0); SIGNAL data_in_GPRS : std_logic_vector (6 downto 0); SIGNAL scram_en_GPRS: std_logic; SIGNAL scram_rst_GPRS: std_logic; SIGNAL rst_GPRS: std_logic; SIGNAL clk_GPRS : std_logic; SIGNAL data_out_GPRS : std_logic_vector (6 downto 0); SIGNAL data_in_EDGE : std_logic_vector (15 downto 0); SIGNAL scram_en_EDGE: std_logic; SIGNAL scram_rst_EDGE: std_logic; SIGNAL rst_EDGE: std_logic; SIGNAL clk_EDGE : std_logic; SIGNAL data_out_EDGE : std_logic_vector (15 downto 0); SIGNAL data_in_DVB : std_logic_vector (14 downto 0); SIGNAL scram_en_DVB: std_logic; SIGNAL scram_rst_DVB: std_logic; SIGNAL rst_DVB: std_logic; SIGNAL clk_DVB : std_logic; SIGNAL data_out_DVB : std_logic_vector (14 downto 0); SIGNAL data_in_CDMA2000 : std_logic_vector (41 downto 0); SIGNAL scram_en_CDMA2000: std_logic; SIGNAL scram_rst_CDMA2000: std_logic; SIGNAL rst_CDMA2000: std_logic; SIGNAL clk_CDMA2000 : std_logic; SIGNAL data_out_CDMA2000 : std_logic_vector (41 downto 0); SIGNAL data_in_802154g : std_logic_vector (8 downto 0); SIGNAL scram_en_802154g: std_logic; SIGNAL scram_rst_802154g: std_logic; SIGNAL rst_802154g: std_logic; SIGNAL clk_802154g : std_logic; SIGNAL data_out_802154g : std_logic_vector (8 downto 0); SIGNAL data_in_80220 : std_logic_vector (19 downto 0); SIGNAL scram_en_80220: std_logic; SIGNAL scram_rst_80220: std_logic; SIGNAL rst_80220: std_logic; SIGNAL clk_80220 : std_logic; SIGNAL data_out_80220 : std_logic_vector (19 downto 0); component scramblerWCDMA port ( data_in_WCDMA : in std_logic_vector (24 downto 0); scram_en_WCDMA, scram_rst_WCDMA , rst_WCDMA, clk_WCDMA : in std_logic; data_out_WCDMA : out std_logic_vector (24 downto 0)); end component; component scramblerUMTS port ( data_in_UMTS : in std_logic_vector (16 downto 0); scram_en_UMTS, scram_rst_UMTS , rst_UMTS, clk_UMTS : in std_logic; data_out_UMTS : out std_logic_vector (16 downto 0)); end component; component scramblerGSM port ( data_in_GSM : in std_logic_vector (30 downto 0); scram_en_GSM, scram_rst_GSM , rst_GSM, clk_GSM : in std_logic; data_out_GSM : out std_logic_vector (30 downto 0)); end component; component scramblerGPRS port ( data_in_GPRS : in std_logic_vector (6 downto 0); scram_en_GPRS, scram_rst_GPRS , rst_GPRS, clk_GPRS : in std_logic; data_out_GPRS : out std_logic_vector (6 downto 0)); end component; component scramblerEDGE port ( data_in_EDGE : in std_logic_vector (15 downto 0); scram_en_EDGE, scram_rst_EDGE , rst_EDGE, clk_EDGE : in std_logic; data_out_EDGE : out std_logic_vector (15 downto 0)); end component; component scramblerDVB port ( data_in_DVB : in std_logic_vector (14 downto 0); scram_en_DVB, scram_rst_DVB , rst_DVB, clk_DVB : in std_logic; data_out_DVB : out std_logic_vector (14 downto 0)); end component; component scramblerCDMA2000 port ( data_in_CDMA2000 : in std_logic_vector (41 downto 0); scram_en_CDMA2000, scram_rst_CDMA2000 , rst_CDMA2000, clk_CDMA2000 : in std_logic; data_out_CDMA2000 : out std_logic_vector (41 downto 0)); end component; component scrambler802154g port ( data_in_802154g : in std_logic_vector (8 downto 0); scram_en_802154g, scram_rst_802154g , rst_802154g, clk_802154g : in std_logic; data_out_802154g : out std_logic_vector (8 downto 0)); end component; component scrambler80220 port ( data_in_80220 : in std_logic_vector (19 downto 0); scram_en_80220, scram_rst_80220 , rst_80220, clk_80220 : in std_logic; data_out_80220 : out std_logic_vector (19 downto 0)); end component; begin U1:scramblerWCDMA port map(data_in_WCDMA ,scram_en_WCDMA ,scram_rst_WCDMA ,rst_WCDMA,clk_WCDMA ,data_out_WCDMA ); U2:scramblerUMTS port map(data_in_UMTS,scram_en_UMTS, scram_rst_UMTS , rst_UMTS, clk_UMTS,data_out_UMTS); U3:scramblerGSM port map(data_in_GSM,scram_en_GSM, scram_rst_GSM , rst_GSM, clk_GSM,data_out_GSM); U4:scramblerGPRS port map(data_in_GPRS,scram_en_GPRS, scram_rst_GPRS , rst_GPRS, clk_GPRS,data_out_GPRS); U5:scramblerEDGE port map(data_in_EDGE,scram_en_EDGE, scram_rst_EDGE , rst_EDGE, clk_EDGE,data_out_EDGE); U6:scramblerDVB port map(data_in_DVB,scram_en_DVB, scram_rst_DVB , rst_DVB, clk_DVB,data_out_DVB); U7:scramblerCDMA2000 port map(data_in_CDMA2000,scram_en_CDMA2000, scram_rst_CDMA2000 , rst_CDMA2000, clk_CDMA2000,data_out_CDMA2000); U8:scrambler802154g port map(data_in_802154g,scram_en_802154g, scram_rst_802154g , rst_802154g, clk_802154g,data_out_802154g); U9:scrambler80220 port map(data_in_80220,scram_en_80220, scram_rst_80220 , rst_80220, clk_80220,data_out_80220); process (data_in_WCDMA , Sel) is begin case Sel is when "000" => e <= U1 ; --when "001" => Output <= b; --when "010" => Output <= c; --when "011" => Output <= d; --when "100" => Output <= e; --when "101" => Output <= f; --when "110" => Output <= g; --when "110" => Output <= g; --when others => Output <= h; end case; end process; end arch_comp_sc ;